Intersil Corporation HCS86MS Datasheet
September 1995
HCS86MS
Radiation Hardened
Quad 2-Input Exclusive OR Gate
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
2
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
/mg
-9
Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 10
10
• Dose Rate Upset >10
RAD (Si)/s 20ns Pulse
12
RAD (Si)/s
• Latch-Up Free Under Any Conditions
o
• Military Temperature Range: -55
C to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCS86MS is a Radiation Hardened Quad 2-Input
Exclusive OR Gate. A high on any one input exclusively will
change the output to a High state.
The HCS86MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family with
either TTL or CMOS input compatibility.
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-183S CDIP2-T14, LEAD FINISH C
TOP VIEW
A1
1
B1
2
Y1
3
A2
4
B2
5
6
Y2
7
GND
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-183S CDFP3-F14, LEAD FINISH C
TOP VIEW
1A1
B1
Y1
A2
B2
Y2
GND
2
3
4
5
6
7
VCC
14
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
14
13
12
11
10
9
8
VCC
B4
A4
Y4
B3
A3
Y3
The HCS86MS is supplied in a 14 lead Weld Seal Ceramic
flatpack (K suffix) or a Weld Seal Ceramic Dual-In-Line Package
(D suffix).
Functional Diagram
(1, 4, 9, 12)
Ordering Information
PART
NUMBER
HCS86DMSR -55oC to +125oC Intersil Class
HCS86KMSR -55oC to +125oC Intersil Class
HCS86D/
Sample
HCS86K/
Sample
HCS86HMSR +25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
TEMPERATURE
RANGE
+25oC Sample 14 Lead SBDIP
+25oC Sample 14 Lead Ceramic
SCREENING
LEVEL PACKAGE
14 Lead SBDIP
S Equivalent
14 Lead Ceramic
S Equivalent
Flatpack
Flatpack
93
(2, 5, 10, 13)
NOTE: L = Logic Level Low, H = Logic level High
An
Bn
TRUTH TABLE
INPUTS OUTPUTS
An Bn Yn
LLL
LHH
HLH
HHL
Spec Number
(3, 6, 8, 11)
Yn
518773
File Number 3058.1
Specifications HCS86MS
Absolute Maximum Ratings Reliability Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF). . . . . 100ns/V Max
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Thermal Resistance θ
SBDIP Package. . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.5mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .8.6mW/oC
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
Input High Voltage (VIH). . . . . . . . . . . . . . . . . . 70% of VCC to VCC
JA
θ
JC
(NOTE 1)
PARAMETER SYMBOL
Quiescent Current ICC VCC = 5.5V,
Output Current
(Sink)
Output Current
(Source)
Output Voltage Low VOL VCC = 4.5V, VIH = 3.15V,
Output Voltage High VOH VCC = 4.5V, VIH = 3.15V,
Input Leakage
Current
IOL VCC = 4.5V, VIH = 4.5V,
IOH VCC = 4.5V, VIH = 4.5V,
IIN VCC = 5.5V, VIN = VCC or
CONDITIONS
VIN = VCC or GND
VOUT = 0.4V, VIL = 0V
VOUT = VCC -0.4V,
VIL = 0V
IOL = 50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOL = 50µA, VIL = 1.65V
IOH = -50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOH = -50µA, VIL = 1.65V
GND
GROUP
A SUB-
GROUPS TEMPERATURE
1 +25oC-10µA
2, 3 +125oC, -55oC - 200 µA
1 +25oC 4.8 - mA
2, 3 +125oC, -55oC 4.0 - mA
1 +25oC -4.8 - mA
2, 3 +125oC, -55oC -4.0 - mA
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC VCC
1, 2, 3 +25oC, +125oC, -55oC VCC
1 +25oC-±0.5 µA
2, 3 +125oC, -55oC-±5.0 µA
LIMITS
-V
-0.1
-V
-0.1
UNITSMIN MAX
Noise Immunity
Functional Test
NOTES:
1. All voltages reference to device GND.
2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
FN VCC = 4.5V,
VIH = 0.70(VCC), (Note 2)
VIL = 0.30(VCC)
7, 8A, 8B +25oC, +125oC, -55oC---
94
Spec Number 518773
Specifications HCS86MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
(NOTES 1, 2)
PARAMETER SYMBOL
Data to Input TPHL VCC = 4.5V 9 +25oC 2 18 ns
Data to Input TPLH VCC = 4.5V 9 +25oC 2 20 ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
Capacitance Power
Dissipation
Input Capacitance CIN VCC = 5.0V, f = 1MHz 1 +25oC - 10 pF
Output Transition
Time
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
CPD VCC = 5.0V, f = 1MHz 1 +25oC - 33 pF
TTHL
TTLH
CONDITIONS
VCC = 4.5V 1 +25oC - 15 ns
A SUB-
GROUPS TEMPERATURE
10, 11 +125oC, -55oC 2 20 ns
10, 11 +125oC, -55oC 2 22 ns
1 +125oC, -55oC - 54 pF
1 +125oC, -55oC - 10 pF
1 +125oC, -55oC - 22 ns
LIMITS
UNITSMIN MAX
LIMITS
UNITSMIN MAX
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
(NOTES 1, 2)
PARAMETER SYMBOL
Quiescent Current ICC VCC = 5.5V, VIN = VCC or GND +25oC - 0.2 mA
Output Current (Sink) IOL VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
Output Current (Source) IOH VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
Output Voltage Low VOL VCC = 4.5V and 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOL = 50µA
Output Voltage High VOH VCC = 4.5V and 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOH = -50µA
Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND +25oC-±5 µA
Noise Immunity
Functional Test
Data to Output TPHL VCC = 4.5V +25oC 2 20 ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
FN VCC = 4.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), (Note 3)
TPLH VCC = 4.5V +25oC 2 22 ns
CONDITIONS
TEMP-
ERATURE
+25oC 4.0 - mA
+25oC -4.0 - mA
+25oC - 0.1 V
+25oC VCC
+25oC ---
LIMITS
UNITSMIN MAX
-V
-0.1
95
Spec Number 518773
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