Intersil Corporation HCS74MS Datasheet

September 1995

HCS74MS

Radiation Hardened Dual-D

Flip-Flop with Set and Reset

Features

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD (Si)

• SEP Effective LET No Upsets: >100 MEV-cm

• Single Event Upset (SEU) Immunity < 2 x 10

/mg

-9

Errors/

Bit-Day (Typ)

• Dose Rate Survivability: >1 x 10

• Dose Rate Upset >10

RAD (Si)/s 20ns Pulse

RAD (Si)/s

• Latch-Up Free Under Any Conditions

• Military Temperature Range: -55

C to +125oC

• Signiﬁcant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current Levels Ii ≤ 5µA at VOL, VOH

Description

The Intersil HCS74MS is a Radiation Hardened positive edge triggered ﬂip-ﬂop with set and reset.

The HCS74MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS74MS is supplied in a 14 lead Ceramic ﬂatpack (K sufﬁx) or a SBDIP Package (D sufﬁx).

Pinouts

CP1

S1 Q1 Q1

GND

14 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T14, LEAD FINISH C

TOP VIEW

R1N

1 2

CP1

S1N

Q1N

GND

14 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP3-F14, LEAD FINISH C

TOP VIEW

1R1 2 3 4 5 6 7

VCC

R2N

CP2

S2N

Q2N

14 13

12 11 10

9 8

VCC R2 D2 CP2 S2 Q2 Q2

Ordering Information

PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE

HCS74DMSR -55oC to +125oC Intersil Class S Equivalent 14 Lead SBDIP

HCS74KMSR -55oC to +125oC Intersil Class S Equivalent 14 Lead Ceramic Flatpack

HCS74D/Sample +25oC Sample 14 Lead SBDIP

HCS74K/Sample +25oC Sample 14 Lead Ceramic Flatpack

HCS74HMSR +25oC Die Die

Spec Number

File Number 2142.2

518772

Functional Diagram

1(13)

4(10)

2(12)

HCS74MS

P N

6(8)

P N

3(11)

CL CL

5(9)

TRUTH TABLE

INPUTS OUTPUTS

SET RESET CP D Q Q

LHXXHL

HLXXLH

L L X X H* H*

HH HHL

HH LLH

HHLXQ0Q0

NOTE: L = Logic Level Low, H = Logic Level High, X = Don’t Care

= Transition from Low to High Level

Q0 = The level of Q before the indicated input conditions were established. * This conﬁguration is non-stable, that is, it will not persist when set and reset inputs return to their inactive (High) level.

Spec Number 518772

Speciﬁcations HCS74MS

Absolute Maximum Ratings Reliability Information

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V

DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA

DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA

(All Voltage Reference to the VSS Terminal)

Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC

Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC

Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

ESD Classiﬁcation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1

CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..

Operating Conditions

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V

Input Rise and Fall Times at 4.5V VCC (TR, TF). . . . . 100ns/V Max

Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

Thermal Resistance θ

SBDIP Package. . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W

Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W

Maximum Package Power Dissipation at +125oC Ambient

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W

If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate:

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.5mW/oC

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .8.6mW/oC

Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC

Input High Voltage (VIH). . . . . . . . . . . . . . . . . . 70% of VCC to VCC

(NOTE 1)

PARAMETER SYMBOL

Quiescent Current ICC VCC = 5.5V,

Output Current (Sink)

Output Current (Source)

Output Voltage Low VOL VCC = 4.5V, VIH = 3.15V,

Output Voltage High VOH VCC = 4.5V, VIH = 3.15V,

Input Leakage Current

IOL VCC = 4.5V, VIH = 4.5V,

IOH VCC = 4.5V, VIH = 4.5V,

IIN VCC = 5.5V, VIN = VCC or

CONDITIONS

VIN = VCC or GND

VOUT = 0.4V, VIL = 0V

VOUT = VCC -0.4V, VIL = 0V

IOL = 50µA, VIL = 1.35V

VCC = 5.5V, VIH = 3.85V, IOL = 50µA, VIL = 1.65V

IOH = -50µA, VIL = 1.35V

VCC = 5.5V, VIH = 3.85V, IOH = -50µA, VIL = 1.65V

GND

GROUP

A SUB-

GROUPS TEMPERATURE

1 +25oC-20µA

2, 3 +125oC, -55oC - 400 µA

1 +25oC 4.8 - mA

2, 3 +125oC, -55oC 4.0 - mA

1 +25oC -4.8 - mA

2, 3 +125oC, -55oC -4.0 - mA

1, 2, 3 +25oC, +125oC, -55oC - 0.1 V

1, 2, 3 +25oC, +125oC, -55oC VCC

1 +25oC-±0.5 µA

2, 3 +125oC, -55oC-±5.0 µA

LIMITS

-V

-0.1

-V

-0.1

UNITSMIN MAX

Noise Immunity Functional Test

NOTES:

1. All voltages reference to device GND.

2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.

FN VCC = 4.5V,

VIH = 0.70(VCC), (Note 2) VIL = 0.30(VCC)

7, 8A, 8B +25oC, +125oC, -55oC---

Spec Number 518772

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