Intersil Corporation HCS193MS Datasheet

September 1995

HCS193MS

Radiation Hardened

Synchronous 4-Bit Up/Down Counter

Features

• 3 Micron Radiation Hardened CMOS SOS

• Total Dose 200K RAD (Si)

2

• SEP Effective LET No Upsets: >100 MEV-cm

• Single Event Upset (SEU) Immunity < 2 x 10

/mg

-9

Errors/Bit-

Day (Typ)

• Dose Rate Survivability: >1 x 10

10

• Dose Rate Upset >10

RAD (Si)/s 20ns Pulse

12

RAD (Si)/s

• Latch-Up Free Under Any Conditions

o

• Military Temperature Range: -55

C to +125oC

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 0.30% VCC Max

- VIH = 0.70% VCC Min

• Input Current Levels Ii ≤ 5µA at VOL, VOH

Description

The Intersil HCS193MS is a Radiation Hardened 4-bit binary UP/
DOWN synchronous counter.

Presetting the counter to the number on the preset data inputs
(P0 - P3) is accomplished by a low on the asynchronous parallel
load input (
transition of the clock-up input (high on the clock-down),
decremented on the low to high transition of the clock-down input
(high on the clock-up). A high level on the MR input overrides any
other input to clear the counter to zero. The Terminal Count Up
goes low half a clock period before the zero count is reached and
returns high at the maximum count.

PL). The counter is incremented on the low to high

Pinouts

MIL-STD-1835 CDIP2-T16, LEAD FINISH C

MIL-STD-1835 CDFP4-F16, LEAD FINISH C

P1
Q1
Q0

CPD
CPU

Q2
Q3

GND

16 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

TOP VIEW

P1

1

Q1

2

Q0

3

CPD

4

CPU

5

Q2

6

Q3

7

GND

8

16 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

TOP VIEW

116
2
3
4
5
6
7
8

VCC

16
15

P0

14

MR

13

TCD

12

TCU

11

PL

10

P2
P3

9

15
14
13
12
11
10

9

VCC
P0
MR
TCD
TCU
PL
P2
P3

The HCS193MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.

Ordering Information

PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE

HCS193DMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead SBDIP

HCS193KMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead Ceramic Flatpack

HCS193D/Sample +25oC Sample 16 Lead SBDIP

HCS193K/Sample +25oC Sample 16 Lead Ceramic Flatpack

HCS193HMSR +25oC Die Die

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

270

Spec Number

File Number 3065.1

DB NA

518759

Functional Diagram

HCS193MS

14

MR
11

PL
5

CPU

P0 P1 P2 P3

PL

R PL

P

FF0

CLQQ

R

P

FF1

CLQQ

PL
P

FF2

CLQQ

R

910115

PL
P

FF3

CLQQ

R

12

TCU

13

TCD

4

CPD

8

GND

16

VCC

32 6 7

Q0 Q1 Q2 Q3

TRUTH TABLE

FUNCTION CLOCK UP CLOCK DOWN RESET PARALLEL LOAD

Count Up H L H

Count Down H L H

Reset X X H X

Load Preset Inputs X X L L

H = High Level, L = Low Level, X = Immaterial, = Transition from low to high

Spec Number 518759

271

Specifications HCS193MS

Absolute Maximum Ratings Reliability Information

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V

DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA

DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA

(All Voltage Reference to the VSS Terminal)

Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC

Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC

Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1

CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..

Operating Conditions

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V

Input Rise and Fall Times at 4.5V VCC (TR, TF). . . . . . 100ns Max.

Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

Thermal Resistance θ

SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W

Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W

Maximum Package Power Dissipation at +125oC Ambient

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W

If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.7mW/oC

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .8.8mW/oC

Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC

Input High Voltage (VIH). . . . . . . . . . . . . . . . . . 70% of VCC to VCC

JA

θ

JC

(NOTE 1)

PARAMETER SYMBOL

Quiescent Current ICC VCC = 5.5V,

Output Current
(Sink)

Output Current
(Source)

Output Voltage Low VOL VCC = 4.5V, VIH = 3.15V,

Output Voltage High VOH VCC = 4.5V, VIH = 3.15V,

Input Leakage
Current

IOL VCC = 4.5V, VIH = 4.5V,

IOH VCC = 4.5V, VIH = 4.5V,

IIN VCC = 5.5V, VIN = VCC or

CONDITIONS

VIN = VCC or GND

VOUT = 0.4V, VIL = 0V

VOUT = VCC -0.4V,
VIL = 0V

IOL = 50µA, VIL = 1.35V

VCC = 5.5V, VIH = 3.85V,
IOL = 50µA, VIL = 1.65V

IOL = -50µA, VIL = 1.35V

VCC = 5.5V, VIH = 3.85V,
IOL = -50µA, VIL = 1.65V

GND

GROUP

A SUB-

GROUPS TEMPERATURE

1 +25oC-40µA

2, 3 +125oC, -55oC - 750 µA

1 +25oC 4.8 - mA

2, 3 +125oC, -55oC 4.0 - mA

1 +25oC -4.8 - mA

2, 3 +125oC, -55oC -4.0 - mA

1, 2, 3 +25oC, +125oC, -55oC - 0.1 V

1, 2, 3 +25oC, +125oC, -55oC - 0.1 V

1, 2, 3 +25oC, +125oC, -55oC VCC

1, 2, 3 +25oC, +125oC, -55oC VCC

1 +25oC-±0.5 µA

2, 3 +125oC, -55oC-±5.0 µA

LIMITS

-V

-0.1

-V

-0.1

UNITSMIN MAX

Noise Immunity
Functional Test

NOTES:

1. All voltages reference to device GND.

2. For functional tests VO ≥4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.

FN VCC = 4.5V,

VIH = 0.70(VCC),
VIL = 0.30(VCC), (Note 2)

7, 8A, 8B +25oC, +125oC, -55oC---

272

Spec Number 518759