Intersil Corporation HCS161MS Datasheet

September 1995
HCS161MS
Radiation Hardened
Synchronous Counter
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
2
/mg
-9
Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 10
10
• Dose Rate Upset >10
RAD (Si)/s 20ns Pulse
• Cosmic Ray Upset Immunity 2 x 10
12
RAD (Si)/s
-9
Error/Bit Day (Typ)
• Latch-Up Free Under Any Conditions
o
• Military Temperature Range: -55
C to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
• Input Current Levels Ii 5µA at VOL, VOH
Description
The Intersil HCS161MS is a Radiation Hardened 4-Input Binary; synchronous counter featuring asynchronous reset and look­ahead carry logic. The HCS161 has an active-low master reset to zero,
MR. A low level at the synchronous parallel enable, SPE, disables counting and allows data at the preset inputs (p0 - p3) to load the counter. The data is latched to the outputs on the posi­tive edge of the clock input, CP. The HCS161MS has two count output, IC. The terminal count output indicates a maximum count for one clock pulse and is used to enable the next cascaded stage to count.
The HCS161MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS161MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
Pinouts
MR
CP
P0 P1 P2 P3
PE
GND
16 LEAD CERAMIC DUAL-IN-LINE
MIL-STD-1835 CDIP2-T16
TOP VIEW
MR
1
CP
2
P0
3
P1
4
P2
5
P3
6
PE
7
GND
8
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16
TOP VIEW
116 2 3 4 5 6 7 8
VCC
16 15
TC Q0
14
Q1
13 12
Q2
11
Q3
10
TE SPEN
9
15 14 13 12 11 10
9
VCC TC Q0 Q1 Q2 Q3 TE SPE
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
HCS161DMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead SBDIP
HCS161KMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead Ceramic Flatpack
HCS161D/Sample +25oC Sample 16 Lead SBDIP
HCS161K/Sample +25oC Sample 16 Lead Ceramic Flatpack
HCS161HMSR +25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
193
Spec Number
File Number 2469.2
DB NA
518755
Functional Diagram
3
V
CC
GND
SPE
9
P0
16
8
P1
HCS161MS
4
5
P2
P3
6
PE
10
7
TE
SPE
T
FF3
C
R
QD
L
Q3
11
TC
15
CP
2
MR
1
R
SPE
T
FF0
R
QD
C
L
Q0 Q1
14
SPE
T
FF1
C
T
R
QD
L
13
SPE
FF2
C
R
QD
L
Q2
12
TRUTH TABLE
INPUTS OUTPUTS
OPERATING MODE
MR CP PE TE SPE Pn Qn TC
Reset (Clear) L XXXXXLL
Parallel Load H X X I I L L
H X X I h H (a)
Count H h h h (c) X Count (a)
Inhibit H X I (b) X h (c) X qn (a)
H X X I (b) h (c) X qn L
H = High Level, L = Low Level, X = Immaterial, = Transition from low to high
Spec Number 518755
194
Specifications HCS161MS
Absolute Maximum Ratings Reliability Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF). . . . . . .100ns Max
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Thermal Resistance θ
SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W
If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.7mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .8.8mW/oC
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
Input High Voltage (VIH). . . . . . . . . . . . . . . . . . 70% of VCC to VCC
JA
θ
JC
(NOTE 1)
PARAMETER SYMBOL
Quiescent Current ICC VCC = 5.5V,
Output Current (Sink)
Output Current (Source)
Output Voltage Low VOL VCC = 4.5V, VIH = 3.15V,
Output Voltage High VOH VCC = 4.5V, VIH = 3.15V,
Input Leakage Current
IOL VCC = 4.5V, VIH = 4.5V,
IOH VCC = 4.5V, VIH = 4.5V,
IIN VCC = 5.5V, VIN = VCC or
CONDITIONS
VIN = VCC or GND
VOUT = 0.4V, VIL = 0V
VOUT = VCC -0.4V, VIL = 0V
IOL = 50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V, IOL = 50µA, VIL = 1.65V
IOH = -50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V, IOH = -50µA, VIL = 1.65V
GND
GROUP
A SUB-
GROUPS TEMPERATURE
1 +25oC-40µA
2, 3 +125oC, -55oC - 750 µA
1 +25oC 4.8 - mA
2, 3 +125oC, -55oC 4.0 - mA
1 +25oC -4.8 - mA
2, 3 +125oC, -55oC -4.0 - mA
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC VCC
1, 2, 3 +25oC, +125oC, -55oC VCC
1 +25oC-±0.5 µA
2, 3 +125oC, -55oC-±5.0 µA
LIMITS
-V
-0.1
-V
-0.1
UNITSMIN MAX
Noise Immunity Functional Test
NOTES:
1. All voltages reference to device GND.
2. For functional tests, VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
FN VCC = 4.5V,
VIH = 0.70(VCC), VIL = 0.30(VCC)
7, 8A, 8B +25oC, +125oC, -55oC---
195
Spec Number 518755
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