November 1994
HCS11MS
Radiation Hardened
Triple 3-Input AND Gate
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K or 1 Mega-RAD(Si)
10
• Dose Rate Upset >10
• Cosmic Ray Upset Immunity < 2 x 10
RAD(Si)/s 20ns Pulse
-9
Errors/Gate Day
(Typ)
• Latch-Up Free Under Any Conditions
o
• Military Temperature Range: -55
C to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCS11MS is a Radiation Hardened Triple 3Input AND Gate. A high on all inputs forces the output to a
High state.
The HCS11MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS11MS is supplied in a 14 lead Weld Seal Ceramic
flatpack (K suffix) or a Weld Seal Ceramic Dual-In-Line
Package (D suffix).
Pinouts
14 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C
TOP VIEW
A1
1
2
B1
3
A2
4
B2
5
C2
6
Y2
7
GND
14 PIN CERAMIC FLAT PACK
MIL-STD-1835 DESIGNATOR CDFP3-F14, LEAD FINISH C
TOP VIEW
1A1
B1
A2
B2
C2
Y2
GND
2
3
4
5
6
7
14
VCC
13
C1
12
Y1
11
C3
10
B3
9
A3
8
Y3
14
13
12
11
10
9
8
VCC
C1
Y1
C3
B3
A3
Y3
Truth Table
INPUTS OUTPUTS
An Bn Cn Yn
LLL L
LLH L
LHL L
LHH L
HLL L
HLH L
HHL L
HHH H
NOTE: L = Logic Level Low, H = Logic level High
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Functional Diagram
(1, 3, 9)
An
(2, 4, 10)
Bn Yn
(13, 5, 11)
Cn
7-135
(12, 6, 8)
File Number
3048
Specifications HCS11MS
Absolute Maximum Ratings Reliability Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . -65
o
C to +150oC
Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . +265
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF). . . . . 100ns/V Max
Operating Temperature Range (T
) . . . . . . . . . . . . -55oC to +125oC
A
TABLE 1. DC. ELECTRICAL PERFORMANCE CHARACTERISTICS
Thermal Impedance . . . . . . . . . . . . . . . . θ
Weld Seal DIC. . . . . . . . . . . . . . . . . . . 75oC/W 16oC/W
Weld Seal Flat Pack . . . . . . . . . . . . . . 64
ja
o
C/W 12oC/W
Power Dissipation per Package (PD)
For T
= -55oC to +100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
A
= +100oC to +125oC Derate Linearly at 13mW/oC
For T
o
C
A
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
Input High Voltage (VIH). . . . . . . . . . . . . . . . . . 70% of VCC to VCC
θ
jc
GROUP
(NOTE 1)
PARAMETERS SYMBOL
CONDITIONS
Quiescent Current ICC VCC = 5.5V,
VIN = VCC or GND
Output Current
(Sink)
Output Current
(Source)
IOL VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
IOH VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V
Output Voltage Low VOL VCC = 4.5V, VIH = 3.15V,
A SUB-
GROUPS TEMPERATURE
1 +25
o
C-10µA
2, 3 +125oC, -55oC - 200 µA
1 +25oC 4.8 - mA
2, 3 +125oC, -55oC 4.0 - mA
1 +25oC -4.8 - mA
2, 3 +125oC, -55oC -4.0 - mA
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
IOL = 50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
IOL = 50µA, VIL = 1.65V
Output Voltage High VOH VCC = 4.5V, VIH = 3.15V,
1, 2, 3 +25oC, +125oC, -55oC VCC
IOH = -50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
1, 2, 3 +25oC, +125oC, -55oC VCC
IOH = -50µA, VIL = 1.65V
Input Leakage
Current
Noise Immunity
Functional Test
IIN VCC = 5.5V, VIN = VCC or
GND
FN VCC = 4.5V,
VIH = 0.70(VCC),
1 +25oC-±0.5 µA
2, 3 +125oC, -55oC-±5.0 µA
7, 8A, 8B +25oC, +125oC, -55oC---
VIL = 0.30(VCC) (Note 2)
NOTE:
1. All voltages reference to device GND.
2. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤0.5V is recognized as a logic “0”.
LIMITS
UNITSMIN MAX
-V
-0.1
-V
-0.1
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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