September 1995
HCS112MS
Radiation Hardened
Dual JK Flip-Flop
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
2
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
/mg
-9
Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 10
10
• Dose Rate Upset >10
RAD (Si)/s 20ns Pulse
12
RAD (Si)/s
• Latch-Up Free Under Any Conditions
o
• Military Temperature Range: -55
C to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCS112MS is a Radiation Hardened dual JK
flip-flop with set and reset. The output changes state on the
negative going transition of the clock pulse. Set and reset
are accomplished asynchronously by a logic low input level.
The HCS112MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
Pinouts
CP1
KA
JA
SA
QA
QA
QB
GND
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
VCC
1
CP1
2
KA
3
JA
4
SA
QA
5
6
QA
7
QB
8
GND
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
116
2
3
4
5
6
7
8
16
15
RA
14
RB
13
CPB
KB
12
JB
11
10
SB
9
QB
15
14
13
12
11
10
9
VCC
RA
RB
CPB
KB
JB
SB
QB
The HCS112MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
HCS112DMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead SBDIP
HCS112KMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead Ceramic Flatpack
HCS112D/Sample +25oC Sample 16 Lead SBDIP
HCS112K/Sample +25oC Sample 16 Lead Ceramic Flatpack
HCS112HMSR +25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
11
Spec Number
File Number 3558.1
DB NA
518830
Specifications HCS112MS
Absolute Maximum Ratings Reliability Information
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . 100ns/V Max
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Thermal Resistance θ
SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.7mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .8.8mW/oC
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . VCC to 70% of VCC
Input High Voltage (VIH). . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
JA
θ
JC
(NOTE 1)
PARAMETER SYMBOL
Supply Current ICC VCC = 5.5V,
Output Current
(Sink)
Output Current
(Source)
Output Voltage Low VOL VCC = 5.5V, VIH = 3.85V,
Output Voltage High VOH VCC = 5.5V, VIH = 3.85V,
Input Leakage
Current
IOL VCC = 4.5V, VIH = 4.5V,
IOH VCC = 4.5V, VIH = 4.5V,
IIN VCC = 5.5V, VIN = VCC or
CONDITIONS
VIN = VCC or GND
VOUT = 0.4V, VIL = 0V,
(Note 2)
VOUT = VCC - 0.4V,
VIL = 0V, (Note 2)
IOL = 50µA, VIL = 1.65V
VCC = 4.5V, VIH = 3.15V,
IOL = 50µA, VIL = 1.35V
IOH = -50µA, VIL = 1.65V
VCC = 4.5V, VIH = 3.15V,
IOH = -50µA, VIL = 1.35V
GND
GROUP
A SUB-
GROUPS TEMPERATURE
1 +25oC-20µA
2, 3 +125oC, -55oC - 400 µA
1 +25oC 4.8 - mA
2, 3 +125oC, -55oC 4.0 - mA
1 +25oC -4.8 - mA
2, 3 +125oC, -55oC -4.0 - mA
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC VCC
1, 2, 3 +25oC, +125oC, -55oC VCC
1 +25oC ±0.5 µA
2, 3 +125oC, -55oC ±5.0 µA
LIMITS
-V
-0.1
-V
-0.1
UNITSMIN MAX
Noise Immunity
Functional Test
NOTES:
1. All voltages referenced to device GND.
2. Force/Measure Functions may be interchanged.
3. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
FN VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V (Note 3)
7, 8A, 8B +25oC, +125oC, -55oC---
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Spec Number 518830