Intersil Corporation HCS02MS Datasheet

August 1995
HCS02MS
Radiation Hardened
Quad 2-Input NOR Gate
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD(Si)
2
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
/mg
-9
Errors/Bit-Day
(Typ)
12
• Dose Rate Survivability: >1 x 10
10
• Dose Rate Upset >10
RAD(Si)/s 20ns Pulse
Rads (Si)/s
• Latch-Up Free Under Any Conditions
o
• Military Temperature Range: -55
C to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii 5µA at VOL, VOH
Description
The Intersil HCS02MS is a Radiation Hardened Quad 2-Input NOR Gate. A low on both inputs forces the output to a High state.
The HCS02MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
Pinouts
A1 B1 Y2 A2 B2
GND
14 LEAD CERAMIC DUAL-IN-LINE
MIL-STD-1835 CDIP2-T14
TOP VIEW
Y1
1 2
A1
3
B1
4
Y2
5
A2
6
B2
7
GND
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14
TOP VIEW
1Y1 2 3 4 5 6 7
14
VCC
13
Y4
12
B4
11
A4
10
Y3
9
B3
8
A3
14 13
12 11 10
9 8
VCC Y4 B4 A4 Y3 B3 A3
The HCS02MS is supplied in a 14 lead Ceramic Flatpack Package (K suffix) or a 14 lead SBDIP Package (D suffix).
Ordering Information
PART
NUMBER
HCS02DMSR -55oC to +125oC Intersil Class
HCS02KMSR -55oC to +125oC Intersil Class
TEMPERATURE
RANGE
SCREENING
LEVEL PACKAGE
14 Lead SBDIP
S Equivalent
14 Lead Ceramic
S Equivalent
Flatpack
NOTE: L = Logic Level Low, H = Logic level High
Functional Diagram
HCS02D/ Sample
HCS02K/ Sample
HCS02HMSR +25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
+25oC Sample 14 Lead SBDIP
(2, 5, 8, 11)
+25oC Sample 14 Lead Ceramic
Flatpack
(3, 6, 9, 12)
1
TRUTH TABLE
INPUTS OUTPUTS
An Bn Yn
LLH
LHL HLL HHL
An
Yn (1, 4, 10, 13)
Bn
DB NA
Spec Number 518744
File Number 2433.2
Specifications HCS02MS
Absolute Maximum Ratings Reliability Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF). . . . . 100ns/V Max
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Thermal Resistance θ
SBDIP Package. . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W
Maximum Package Power Dissipation at +125oC
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.66W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W
If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.5mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .8.6mW/oC
Input Low Voltage (VIL). . . . . . . . . . . . . . .0.0V to 30% of VCC Max.
Input High Voltage (VIH). . . . . . . . . . . . . . 70% of VCC to VCC Min.
JA
θ
JC
(NOTE 1)
PARAMETERS SYMBOL
Quiescent Current ICC VCC = 5.5V,
Output Current (Sink)
Output Current (Source)
Output Voltage Low VOL VCC = 4.5V, VIH = 3.15V,
Output Voltage High VOH VCC = 4.5V, VIH = 3.15V,
Input Leakage Current
IOL VCC = 4.5V, VIH = 4.5V,
IOH VCC = 4.5V, VIH = 4.5V,
IIN VCC = 5.5V, VIN = VCC or
CONDITIONS
VIN = VCC or GND
VOUT = 0.4V, VIL = 0V
VOUT = VCC -0.4V, VIL = 0V
IOL = 50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V, IOL = 50µA, VIL = 1.65V
IOH = -50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V, IOH = -50µA, VIL = 1.65V
GND
GROUP
A SUB-
GROUPS TEMPERATURE
1 +25oC-10µA
2, 3 +125oC, -55oC - 200 µA
1 +25oC 4.8 - mA
2, 3 +125oC, -55oC 4.0 - mA
1 +25oC -4.8 - mA
2, 3 +125oC, -55oC -4.0 - mA
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC VCC
1, 2, 3 +25oC, +125oC, -55oC VCC
1 +25oC-±0.5 µA
2, 3 +125oC, -55oC-±5.0 µA
LIMITS
-V
-0.1
-V
-0.1
UNITSMIN MAX
Noise Immunity Functional Test
NOTES:
1. All voltages reference to device GND.
2. For functional tests, VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
FN VCC = 4.5V,
VIH = 0.70(VCC), VIL = 0.30(VCC) (Note 2)
7, 8A, 8B +25oC, +125oC, -55oC---
2
Spec Number 518744
Specifications HCS02MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
(NOTES 1, 2)
PARAMETER SYMBOL
Input to Yn TPHL VCC = 4.5V 9 +25oC 2 18 ns
Input to Yn TPLH VCC = 4.5V 9 +25oC 2 20 ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
Capacitance Power Dissipation
Input Capacitance CIN VCC = 5.0V, f = 1MHz 1 +25oC - 10 pF
Output Transition Time
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
CPD VCC = 5.0V, f = 1MHz 1 +25oC - 18 pF
TTHL TTLH
CONDITIONS
VCC = 4.5V 1 +25oC - 15 ns
A SUB-
GROUPS TEMPERATURE
10, 11 +125oC, -55oC 2 20 ns
10, 11 +125oC, -55oC 2 22 ns
1 +125oC, -55oC - 26 pF
1 +125oC - 10 pF
1 +125oC - 22 ns
LIMITS
UNITSMIN MAX
LIMITS
UNITSMIN MAX
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
(NOTES 1, 2)
PARAMETERS SYMBOL
Quiescent Current ICC VCC = 5.5V, VIN = VCC or GND +25oC - 0.2 mA Output Current (Sink) IOL VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V +25oC 4.0 - mA Output Current
(Source) Output Voltage Low VOL VCC = 4.5V or 5.5V, VIH = 0.70(VCC),
Output Voltage High VOH VCC = 4.5V or 5.5V, VIH = 0.70(VCC),
Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND +25oC-±5 µA Noise Immunity
Functional Test Input to Yn TPHL VCC = 4.5V +25oC 2 20 ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests, VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
IOH VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VIL = 0.30(VCC) at 200K RAD, IOL = 50µA
VIL = 0.30(VCC) at 200K RAD, IOH = -50µA
FN VCC = 4.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC) at 200K RAD, (Note 3)
TPLH VCC = 4.5V +25oC 2 22 ns
CONDITIONS TEMPERATURE
+25oC -4.0 - mA
+25oC - 0.1 V
+25oC VCC
+25oC ---
200K RAD LIMITS
UNITSMIN MAX
-V
-0.1
Spec Number 518744
3
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