intersil HC-5504DLC DATA SHEET

查询HC1-5504DLC-5供应商
®
N
E
M
M
O
C
E
R
May 1997
T
O
N
c
r
o
1
e
e
S
t
c
a
t
n
o
N
I
-
8
8
8
-
0
5
5
C
H
e
T
r
u
o
L
I
S
R
E
T
S
N
G
I
S
E
D
W
E
N
R
O
F
D
E
D
B
4
n
h
c
r
o
C
H
d
n
a
i
w
p
u
S
l
a
c
n
i
.
w
w
1
B
4
0
5
5
p
e
t
n
e
C
t
r
o
m
o
c
.
l
i
s
r
HC-5504DLC
t
a
r
e
t
c
s
t
/
SLIC
Subscriber Line Interface Circuit
Features
• Pin for Pin Replacement for the HC-550 4
• Capable of +5V or +12V (
VB+) Operation
• Monolithic Integrat ed Device
• DI High Voltage Process
• Compatible With Worldwide PBX Performance Requirements
• Controlled Supply of Battery Feed Current for Short Loops (41mA)
• Internal Ring Relay Driver
• Allows Interfacing With Negative Superimposed Ring­ing Systems
• Low Power Consumption During Standby
• Switch Hook Ground Key and Ring Trip Detection Functions
• Selective Denial of Power to Subscriber Loops
Applications
• Solid State Line Interface Circuit for Analog and Digi­tal PBX Systems
• Direct Inward Dial (DID) Trunks
• Voice Messaging PBXs
• Allows Multi-Phone Operation
Description
The Intersil SLIC incorporates many of the BORSHT functions on a single IC chip. This includes DC battery feed, a ring relay driver, supervisory and hybrid functions. This device is designed to maintain transmissi on performanc e in the pr es­ence of externally induced longitudinal currents. Using the unique Intersil d iel e ct ric i s ol a t ion pr o cess, the S LIC can oper­ate directly with a wide range of station battery voltages.
The SLIC also provides selective denial of power. If the PBX system bec om es overloaded duri ng an emergency, the SLIC will provide system protection by denying power to selected subscriber l oops.
The Intersil SLIC is i deally suited for the design of new digital PBX systems by eliminati ng bulky hybrid transformers.
Ordering Information
PART
NUMBER
HC1-5504DLC-5 0 HC1-5504DLC-9 -40 HC3-5504DLC-5 0 HC3-5504DLC-9 -40 HC4P5504DLC-5 0 HC4P5504DLC-9 -40 HC9P5504DLC-5 0 HC9P5504DLC-9 -40
TEMPERATURE
RANGE PACKAGE
o
to +75oC 24 Lead Ceramic DIP
o
to +85oC 24 Lead Ceramic DIP
o
to +75oC 24 Lead Plastic DIP
o
to +85oC 24 Lead Plastic DIP
o
to +75oC 28 Lead PLC C
o
to +85oC 28 Lead PLC C
o
to +75oC 24 Lead SOIC
o
to +85oC 24 Lead SOIC
Pinouts
HC-5504DLC (PDIP, CDIP, SOIC)
TOP VIEW
TIP
1
RING
2 3
RFS
VB+
4
C3
5
DG
6
RS
7
RD
8
TF
9
RF
10 11
VB-
BG
12
CAUTION: These devic es are sensitive to electrostatic discharge; foll ow prop er IC Handling Pro cedures. 1-888-INTERSIL or 321-724-7143 Copyright © Intersil Americas Inc. 2002. All Rights Reserved
| Intersil (and design) is a registered trademark of Intersil Americas Inc .
TX
24
AG
23
C4
22 21
R
X
+IN
20 19
-IN OUT
18
C2
17 16
RC
15
PD
14
GKD
13
SHD
VB+
N/C
8-19
C3
DG
RS
RD
TF
HC-5504DLC (PLCC)
TOP VIEW
RING
RFS
4
5
6
7
8
9
10
11
12 13 14 15 16 17 18
RF
TIP
N/C
-
B
BG
V
N/C
TX
AG
C4
262728123
RX
25
+IN
24
-IN
23
N/C
22
OUT
21
C2
20
RC
19
PD
GKD
SHD
File Number 2443.3
Specifications HC-5504DLC
Absolute Maximum Ratings (Note 1) Operating C o ndi t io ns
Maximum Continuous Supply Voltages
(V
-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -60 to +0.5 V
B
(V
+). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +15 V
B
(V
+ - VB-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +75V
B
Relay Drive Voltage (V
Junction Temperature Ceramic . . . . . . . . . . . . . . . . . . . . . . +175
) . . . . . . . . . . . . . . . . . . . . . . .-0.5 to +15V
RD
Junction Temperature Plastic. . . . . . . . . . . . . . . . . . . . . . . . +150
Lead Temperature (Soldering 10 Sec.) . . . . . . . . . . . . . . . . +300
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Temperature Range
HC-5504DLC-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
HC-5504DLC-9 . . . . . . . . . . . . . . . . . . . . . . . . . . .-40
Storage Temperature Range . . . . . . . . . . . . . . . . . . -65
Relay Driver Voltage (V
o
Positive Supply Voltage (V
C
o
Negative Supply Voltage (V
C
o
High Level Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V
C
). . . . . . . . . . . . . . . . . . . . . . . +5 to +12V
RD
+). . . . . . . 4.7 5 to 5.25 or 10.8 to 13.2 V
B
-) . . . . . . . . . . . . . . . . . . . . -42 to -58V
B
Low Level Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 0.6V
Loop Resistance (R
) . . . . . . . . . . . . . . . . . . . . . . . . . 200 to 1200
L
o
C to +75oC
o
C to +85oC
o
C to 150oC
Electrical Specifications Unless Otherwise Specified, VB- = -48V, VB+ = +12V and +5V, AG = BG = DG = 0V, Typical Parameters
TA = +25oC. Min-Max Parameters are Over Operating Temperature Range.
PARAMETER CONDITIONS MIN TYP MAX UNITS
On Hook Power Dissipation I Off Hook Power Dissipation R Off Hook IB+ R Off Hook IB+ R Off Hook IB- R Off Hook Loop Curr ent R Off Hook Loop Curr ent R
Off Hook Loop Curr ent R
* = 0, VB+ = +12V - 170 235 mW
LONG
= 600, I
L
= 600, I
L
= 600, I
L
= 600, I
L
= 1200, I
L
= 1200, VB- = -42V, I
L
T
= +25oC
A
= 200, I
L
* = 0, VB+ = +12V - 425 550 mW
LONG
* = 0, TA = -40oC--6.0mA
LONG
* = 0, TA = +25oC--5.3mA
LONG
* = 0 - 35 41 mA
LONG
* = 0 - 21 - mA
LONG
* = 0
LONG
* = 0 36 41 48 mA
LONG
17.5 - - mA
Fault Curr en ts
TIP to Ground -14-mA RING to Ground -55-mA TIP to RING -41-mA TIP and RING to Ground -55-mA
Ring Relay Drive V
OL
Ring Relay Driver Off Leakage V Ring Trip Detection Period R
IOL = 62mA - 0.2 0.5 V
= +12V, RC = 1 = HIGH, TA = +25oC--100µA
RD
= 600 -23Ring
L
Cycles On Hook Ringing Current - - 30 mApk Switch Hook Detection Threshold SHD
SHD
Ground Key Detection Thresh old GKD
GKD
Loop Current During Power Denial R
= 200 - ±2-mA
L
= V = V = V = V
OL OH OL OH
18 - - mA
--12mA
20 - - mA
--10mA
Dial Pulse Distortion 0-5ms Receive Input Impedance (Note 2) - 110 - k Transmit Output Impedance (Note 2) - 10 20 Two Wire R eturn Loss (Referenced to 600Ω + 2.16µF), (Note 2)
LO -15.5- dB
SR
L
ER
L
HI -31-dB
SR
L
Longit udinal Balance 1V
200Hz - 3400Hz, (Note 2) IEEE Method
RMS
-24-dB
2 Wire Off Hook 58 65 - dB 2 Wire On Hook 60 63 - dB
o
4 Wire Off Hook 0
C TA +75oC5058-dB
8-20
Specifications HC-5504DLC
Electrical Specifications Unless Otherwise Specified, V
TA = +25oC. Min-Max Parameters are Over Operating Temperature Range. (Continued)
- = -48V, VB+ = +12V and +5V, AG = BG = DG = 0V, Typical Parameters
B
PARAMETER CONDITIONS MIN TYP MAX UNITS
Low Freq uency Longitudinal Balance R.E.A. Method, (Note 2), RL = 600
o
0
C TA +75oC
--23dBrnC
---67dBm0p
Insertion Loss at 1kHz, 0dBm Input Level, Referenced 600
2 Wire - 4 Wire, 4 Wire - 2 Wire - ±0.05 ±0.2 dB
Frequency Response 200 - 3400Hz Referenced to Absolute Loss at
- ±0.02 ±0.05 dB
1kHz and 0dBm Signal Level (Note 2)
Idle Channel Noise (Note 2)
2 Wire - 4 Wire, 4 Wire - 2 Wire - 1 5 dBrnC
- -89 -85 dBm0p
Absolute Delay (Note 2)
2 Wire - 4 Wire, 4 Wire - 2 Wire - - 2 ms
Trans Hybrid Loss Balance Network Set Up for 600 Terminatio n at
36 40 - dB
1kHz
Overload Level V
2 Wire - 4 Wire, 4 Wire - 2 Wire V
+ = +5V 1.5 - - Vpeak
B
+ = +12V 1.75 - - Vpeak
B
Level Li nearity At 1kHz, (N ote 2) Referenced to 0dBm Level
2 Wire - 4 Wire, 4 Wire - 2 Wire +3 to -40dBm - - ±0.05 dB
-40 to -50dBm - - ±0.1 dB
-50 to -55dBm - - ±0.3 dB
Power Supply Rejection Ratio (Note 2)
+ to 2 Wire 30 - 60Hz, RL = 600 15 - - dB
V
B
+ to Tr ansmit 15 - - dB
V
B
- to 2 Wire 15 - - dB
V
B
- to Transmit 15 - - dB
V
B
+ to 2 Wire 200 - 16kHz RL = 600 30 - - dB
V
B
+ to Tr ansmit 30 - - dB
V
B
- to 2 Wire 30 - - dB
V
B
- to Transmit 30 - - dB
V
B
Logic Input Current (RS, RC
, PD)0V ≤ VIN + 5V - - ±100 µA
Logic Inputs
Logic ‘0 ’ V Logic ‘1 ’ V
IL IH
--0.8V
2.0 - 5.5 V
Logic Out puts
I
Logic ‘0 ’ V Logic ‘1 ’ V
= Longit udinal Current
*I
LONG
OL OH
800µA, VB+ = +12V, +5V - 0.1 0.5 V
LOAD
I
80µA, VB+ = +12V 2.7 5.0 5.5 V
LOAD
40µA, VB+ = +5V 2.7 - 5.0 V
I
LOAD
NOTES:
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Func-
tional operability und er any of these conditions is not necessarily implied.
2. These para mete rs are con trol led by des ign or process param eters and are no t direc tly test ed. These para mete rs are cha racte rized up on
initia l d esi gn rel ea se, upon des ig n ch an ges w hi ch wo ul d aff ec t these cha r acte r isti cs , a nd a t int erv al s t o as sure pr oduc t q ual i ty and spec­ific ation compliance .
8-21
Loading...
+ 6 hidden pages