HA-4900, HA-4902, HA-4905
Data Sheet September 1998 File Number 2855.3
Precision Quad Comparators
The HA-4900 series are monolithic, quad, precision
comparators offering fast response time, low offset voltage,
low offset current and virtually no channel-to-channel
crosstalk for applications requiring accurate, high speed,
signal leveldetection.Thesecomparatorscansensesignals
at groundlevel while beingoperatedfrom either a single +5V
supply (digital systems) or from dual supplies (analog
networks) up to ±15V.The HA-4900 series contains a unique
current driven output stage which can be connected to logic
system supplies (V
LOGIC
+ and V
-) to make the output
LOGIC
levels directly compatible (no external components needed)
with any standard logic or special system logic levels. In
combination analog/digital systems, the design employed in
the HA-4900 series input and output stages prevents
troublesome ground coupling of signals between analog and
digital portions of the system.
These comparators’ combination of features make them
ideal components for signal detection and processing in data
acquisition systems, test equipment and
microprocessor/analog signal interface networks.
For military grade product, refer to the HA-4902/883 data
sheet.
Pinout
HA-4900, HA-4902 (CERDIP)
HA-4905 (PDIP, CERDIP, SOIC)
TOP VIEW
16
VL+
OUT 1
-IN 1
+IN 1
+IN 2
-IN 2
OUT 2
1
2
3
-
+
4
5
V-
6
+
-
7
8
4
1
3
2
OUT 4
-IN 4
15
-
+
14
+IN 4
V+
13
12
+IN 3
+
-
11
-IN 3
10
OUT 3
9
-
V
L
Features
• Fast Response Time . . . . . . . . . . . . . . . . . . . . . . . .130ns
• Low Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 2.0mV
• Low Offset Current. . . . . . . . . . . . . . . . . . . . . . . . . . .10nA
• Single or Dual Voltage Supply Operation
• Selectable Output Logic Levels
• Active Pull-Up/Pull-Down Output Circuit. No External
Resistors Required
Applications
• Threshold Detector
• Zero Crossing Detector
• Window Detector
• Analog Interfaces for Microprocessors
• High Stability Oscillators
• Logic System Interfaces
Ordering Information
PART
NUMBER
HA1-4900-2 -55 to 125 16 Ld CERDIP F16.3
HA1-4902-2 -55 to 125 16 Ld CERDIP F16.3
HA1-4905-5 0 to 75 16 Ld CERDIP F16.3
HA3-4905-5 0 to 75 16 Ld PDIP E16.3
HA9P4905-5 0 to 75 16 Ld SOIC M16.3
TEMP RANGE
(oC) PACKAGE PKG. NO.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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| Copyright © Intersil Corporation 1999
HA-4900, HA-4902, HA-4905
Absolute Maximum Ratings Thermal Information
Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . . 33V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Voltage Between V
Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Power Dissipation (Notes 1, 2)
LOGIC
+ and V
-. . . . . . . . . . . . . . . . . . .18V
LOGIC
Operating Conditions
Temperature Range
HA-4900-2, HA-4902-2. . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
HA-4905-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation, including output load, must be designed to maintain the junction temperature below 175oC for ceramic packages,
and below 150oC for plastic packages.
2. Total Power Dissipation (T.P.D.) is the sum of individual dissipation contributions of V+, V- and V
vs Supply Voltages (see Performance Curves). The calculated T.P.D. is then located on the graph of Maximum Allowable Package Dissipation
vs Ambient Temperature to determine ambient temperature operating limits imposed by the calculated T.P.D. (See Performance Curves). For
instance, the combination of +15V, -15V, +5V, 0V (V+, V-, V
0V gives a T.P.D. of 450mW.
3. θJA is measured with the component mounted on an evaluation PC board in free air.
LOGIC
Thermal Resistance (Typical, Note 3) θJA (oC/W) θJC (oC/W)
CERDIP Package. . . . . . . . . . . . . . . . . 85 25
PDIP Package . . . . . . . . . . . . . . . . . . . 90 N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 100 N/A
Maximum Junction Temperature (Ceramic Package) . . . . . . .175oC
Maximum Junction Temperature (Plastic Package). . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Die Characteristics
Back Side Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V-
Number of Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137
Die Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 mils x 105 mils
shown in curves of Power Dissipation
LOGIC
+, V
-) gives a T.P.D. of 350mW, the combination +15V, -15V, +15V,
LOGIC
Electrical Specifications V
PARAMETER
INPUT CHARACTERISTICS
Offset Voltage (Note 4) 25 - 2 3 - 2 5 - 4 7.5 mV
Offset Current 25 - 10 25 - 10 35 - 25 50 nA
Bias Current (Note 5) 25 - 50 75 - 50 150 - 100 150 nA
Input Sensitivity (Note 6) 25 - - VIO +
Common Mode Range Full V- - (V+) -
Differential Input Resistance 25 - 250 - - 250 - - 250 - MΩ
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain 25 - 400 - - 400 - - 400 - kV/V
Response Time (tPD(0))
(Note 7)
Response Time (tPD(1))
(Note 7)
= 15V, V
SUPPLY
TEMP
(oC)
Full - - 4 - - 8 - - 10 mV
Full - - 35 - - 45 - - 70 nA
Full - - 150 - - 200 - - 300 nA
Full - - VIO +
25 - 130 200 - 130 200 - 130 200 ns
25 - 180 215 - 180 215 - 180 215 ns
+ = 5V, V
LOGIC
HA-4900-2
-55oC to 125oC
LOGIC
0.3
0.4
2.4
- = GND
HA-4902-2
-55oC to 125oC
--V
--V
V- - (V+) -
IO
0.5
IO
0.6
2.6
HA-4905-5
0oC to 75oC
+
+
--V
--V
V- - (V+) -
IO
0.5
IO
0.7
2.4
UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX
+
+
mV
mV
V
2
HA-4900, HA-4902, HA-4905
Electrical Specifications V
PARAMETER
SUPPLY
TEMP
(oC)
= 15V, V
+ = 5V, V
LOGIC
HA-4900-2
-55oC to 125oC
- = GND (Continued)
LOGIC
-55oC to 125oC
HA-4902-2
HA-4905-5
0oC to 75oC
UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX
OUTPUT CHARACTERISTICS
Output Voltage Level
Logic “Low State” (VOL)
Full - 0.2 0.4 - 0.2 0.4 - 0.2 0.4 V
(Note 8)
Logic “High State” (VOH)
Full 3.5 4.2 - 3.5 4.2 - 3.5 4.2 - V
(Note 8)
Output Current
I
SINK
I
SOURCE
Full 3.0 - - 3.0 - - 3.0 - - mA
Full 3.0 - - 3.0 - - 3.0 - - mA
POWER SUPPLY CHARACTERISTICS
Supply Current, IPS (+) 25 - 6.5 20 - 6.5 20 - 7 20 mA
Supply Current, IPS (-) 25 - 4 8 - 4 8 - 5 8 mA
Supply Current, IPS (Logic) 25 - 3.5 4 - 3.5 4 - 3.5 4 mA
Supply Voltage Range
V
+ (Note 2) Full 0 - +15.0 0 - +15.0 0 - +15.0 V
LOGIC
V
- (Note 2) Full -15.0 - 0 -15.0 - 0 -15.0 - 0 V
LOGIC
NOTES:
4. Minimum differential input voltage required to ensure a defined output state.
5. Input bias currents are essentially constant with differential input voltages up to ±9V. With differential input voltages from ±9V to ±15V, bias current on the more negative input can rise to approximately 500µA. This will also cause higher supply currents.
6. VCM= 0V. Input sensitivity is the worst case minimum differential input voltage required to guarantee a given output logic state. This parameter
includes the effects of offset voltage and voltage gain.
7. For tPD(1); 100mV input step, -10mV overdrive. For tPD(0); -100mV input step, 10mV overdrive. Frequency ≈100Hz; Duty Cycle ≈50%; Inverting input driven. See Figure 1 for Test Circuit. All unused inverting inputs tied to +5V.
8. For VOH and VOL:I
SINK
= I
SOURCE
= 3.0mA. For other values of V
; VOH (Min) = V
LOGIC
LOGIC
+ -1.5V.
Test Circuit and Waveform
+15V
+5V
-
DUT
+
-15V
3
V
OUT
OVERDRIVE
100mV
INPUT
OUTPUT
FIGURE 1.
t = 0
tPD(0)
t
PD
(0)
1.5V
t
(1)
PD
V
= 0V
TH
100mV
OVERDRIVE
t = 0
1.5V
V
= 0V
TH
(1)
t
PD