®
EL9110
Data Sheet November 30, 2007
Differential Receiver/Equalizer
The EL9110 is a single channel differential receiver and
equalizer. It contains a high speed differential receiver with 5
programmable poles. The outputs of these pole blocks are
then summed into an output buffer. The equalization length
is set with the voltage on a single pin. The EL9110 also
contains a three-statable output, enabling multiple devices to
be connected in parallel and used in a multiplexing
application.
The gain can be adjusted up or down by 6dB using the
V
control signal. In addition, a further 6dB of gain can
GAIN
be switched in to provide a matched drive into a cable.
The EL9110 has a bandwidth of 150MHz and consumes just
33mA on ±5V supply. A single input volt age is used to set the
compensation levels for the required length of cable.
The EL9110 is available in the 16 Ld QSOP package and is
specified for operation over the full -40°C to +85°C
temperature range.
Ordering Information
PART
NUMBER
EL9110IU 9110IU 16 Ld QSOP MDP0040
EL9110IU-T7* 9110IU 16 Ld QSOP MDP0040
EL9110IU-T13* 9110IU 16 Ld QSOP MDP0040
EL9110IUZ
(Note)
EL9110IUZ-T7*
(Note)
EL9110IUZ-T13*
(Note)
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
PART
MARKING PACKAGE PKG. DWG. #
9110IUZ 16 Ld QSOP
(Pb-free)
9110IUZ 16 Ld QSOP
(Pb-free)
9110IUZ 16 Ld QSOP
(Pb-free)
MDP0040
MDP0040
MDP0040
Features
• 150MHz -3dB bandwidth
• CAT-5 compensation
- 75MHz @ 1000ft
- 125MHz @ 500ft
• 33mA supply current
• Differential input range 3.2V
• Common mode input range ±4.5V
• ±5V supply
• Output to within 1.5V of supplies
• Available in 16 Ld QSOP package
• Pb-free available (RoHS compliant)
Applications
• Twisted-pair receiving/equalizer
• KVM (Keyboard/Video/Mouse)
• VGA over twisted-pair
• Security video
Pinout
EL9110
(16 LD QSOP)
TOP VIEW
CTRL_REF
CMOUT
LOGIC_REF
1
VCTRL
2
3
VINP
VINM
4
VS-
5
6
VGAIN
7
8 9
16
15
14
13
12
11
10
FN7305.5
CMEXT
VS+
ENBL
VSA+
VOUT
VSA-
0V
X2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2005, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
EL9110
Absolute Maximum Ratings (T
Supply Voltage between VS+ and VS-. . . . . . . . . . . . . . . . . . . . .12V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA
Pin Voltages. . . . . . . . . . . . . . . . . . . . . . . . . V
= +25°C) Thermal Information
A
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
- -0.5V to VS+ +0.5V
S
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Die Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T
Electrical Specifications V
= VA+ = +5V, VSA- = VA- = -5V, TA = +25°C, Unless Otherwise Specified
SA+
PARAMETER DESCRIPTION CONDITIONS
= TC = T
J
A
MIN
(Note 1) TYP
MAX
(Note 1) UNIT
AC PERFORMANCE
BW Bandwidth (See Figure 1) 150 MHz
SR Slew Rate V
THD Total Harmonic Distortion 10MHz 1V
= -1V to +1V , VG = 0.35, VC = 0, RL = 75 + 75Ω 1.5 V/ns
IN
out, VG = 0.35V, X2 gain, VC = 0 -50 dBc
P-P
DC PERFORMANCE
V
OS
Offset Voltage (bin #1) X2 gain, no equalization -250 -10 +250 mV
Offset Voltage (bin #2) CPI9049 mV
INPUT CHARACTERISTICS
CMIR Common-mode Input Range Common-mode extension off -4/+3.5 V
CMIRx Extended CMIR Common-mode extension on ±4.5 V
O
NOISE
Output Noise VG = 0.35, X2 gain, 75 + 75Ω load, VC = 0.6 25 mV
RMS
CMRR Common-mode Rejection Ratio Measured at 10kHz 60 dB
CMRR+ Common-mode Rejection Ratio Measured at 10MHz 50 dB
CMBW CM Amplifier Bandwidth 10K || 10pF load 50 MHz
CM
C
INDIFF
R
INDIFF
C
INCM
R
INCM
+I
IN
-I
IN
V
INDIFF
SLEW
CM Slew Rate Measured @ +1V to -1V 100 V/µs
Differential Input Capacitance Capacitance V
Differential Input Resistance Resistance V
CM Input Capacitance Capacitance V
CM Input Resistance Resistance V
Positive Input Current DC bias @ V
Negative Input Current DC bias @ V
Differential Input Range V
INP
- V
INM
INP
INP
INP
INP
INP
INP
to V
INM
to V
INM
= V
to ground 1.2 pF
INM
= V
to ground 1 2.8 MΩ
INM
= V
= 0V 1 µA
INM
= V
= 0V 1 µA
INM
12.4 MΩ
600 fF
when slope gain falls to 0.9 2.5 3.2 V
OUTPUT CHARACTERISTICS
V
O
I
OUT
R
OUTCM
DiffGain Differential Gain V
Output Voltage Swing RL = 150Ω ±3.5 V
Output Drive Current RL = 10Ω, V
V
= 0.35
G
INP
= 1V, V
= 0V, X2 = gain,
INM
50 60 mA
CM Output Resistance at 100kHz 30 Ω
= 0, VG = 0.35, X2 = 5, RL = 75 + 75Ω 0.85 1.0 1.1
C
SUPPLY
I
SON
I
SOFF
Supply Current V
Supply Current V
ENBL
ENBL
= 5, V
= 0, V
= 0 27 38 mA
INM
= 0 0.4 0.8 mA
INM
2
FN7305.5
November 30, 2007
EL9110
Electrical Specifications V
PARAMETER DESCRIPTION CONDITIONS
= VA+ = +5V, VSA- = VA- = -5V, TA = +25°C, Unless Otherwise Specified (Continued)
SA+
MIN
(Note 1) TYP
MAX
(Note 1) UNIT
PSRR Power Supply Rejection Ratio DC to 100kHz, ±5V supply 60 dB
LOGIC CONTROL PINS
V
HI
V
LOW
I
LOGICH
I
LOGICL
Logic High Level VIN - V
Logic Low Level VIN - V
LOGIC
LOGIC
Logic High Input Current VIN = 5V, V
Logic Low Input Current VIN = 0V, V
ref for guaranteed high level 1.35 V
ref for guaranteed low level 0.8 V
= 0V 50 µA
LOGIC
= 0V 15 µA
LOGIC
NOTE:
1. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
Pin Descriptions
PIN NUMBER PIN NAME PIN TYPE PIN FUNCTION
1 CTRL_REF Input Reference voltage for V
2 VCTRL Input Control voltage (0 to 1V) to set equalization
3 VINP Input Positive differential input
4 VINM Input Negative differential input
5 VS- Power -5V to core of chip
6 CMOUT Output Output of common mode voltage present at inputs
7 VGAIN Input Control voltage to set overall gain (0V to 1V)
8 LOGIC_REF Input Reference voltage for all logic signals
9 X2 Logic Input Logic signal; low - gain = 1, high - gain = 2
10 0V 0V reference for output voltage
11 VSA- Power -5V to output buffer
12 VOUT Output Single-ended output voltage reference to pin 10
13 VSA+ Power +5V to output buffer
14 ENBL Logic Input Logic signal to enable pin; low - disabled, high - enabled
15 VS+ Power +5V to core of chip
16 CMEXT Logic Input Logic signal to enable CM range extension; active high
GAIN
and V
CTRL
pins
3
FN7305.5
November 30, 2007