intersil EL7564 DATA SHEET

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Data Sheet May 9, 2005
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EL7564
FN7297.3
Monolithic 4 Amp DC/DC Step-Down Regulator
The EL7564 is an integrated, full-featured synchronous step­down regulator with output voltage adjustable from 1.0V to
The EL7564 is specified for operation over the -40°C to +85°C temperature range.
Typical Application Diagrams
EL7564
[20-PIN SO (0.300”)]
TOP VIEW
C5
0.1µF
1
VREF
C4
390pF
R4
C3
22
0.22µF
C2
2.2nF
V
IN
5V
C1
330µF
2
3
4
5
6
7
8
9
10
SGND
COSC
VDD
VTJ
PGND
PGND
VIN
STP
STN
EN
FB
PG
VDRV
VHI
LX
LX
PGND
PGND
PGND
20
19
18
17
16
15
14
13
12
11
C6
0.22µF
L1
4.7µH
330µF
C7
D1
3.3V, 4A
R2
2.37k
R1 1k
V
OUT
C10
100pF
Features
• Integrated synchronous MOSFETs and current mode controller
• 4A continuous output current
• Up to 95% efficiency
• 4.5V to 5.5V input voltage
• Adjustable output from 1V to 3.8V
• Cycle-by-cycle current limit
• Precision reference
• ±0.5% load and line regulation
• Adjustable switching frequency to 1MHz
• Oscillator synchronization possible
• Internal soft start
• Over voltage protection
• Junction temperature indicator
• Over temperature protection
• Under voltage lockout
• Multiple supply start-up tracking
• Power good indicator
• 20-pin SO (0.300”) package
• 28-pin HTSSOP package
• Pb-Free available (RoHS compliant)
Applications
• DSP, CPU core and IO supplies
• Logic/Bus supplies
• Portable equipment
• DC/DC converter modules
• GTL + Bus power supply
Typical Application Diagrams continued on page 3
Manufactured Under U.S. Patent No. 5,7323,974
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Ordering Information
EL7564
TAPE &
PART NUMBER PACKAGE
EL7564CM 20-Pin SO (0.300”) - MDP0027
EL7564CM-T13 20-Pin SO (0.300”) 13” MDP0027
EL7564CMZ (See Note)
EL7564CMZ-T13 (See Note)
EL7564CRE 28-Pin HTSSOP - MDP0048
EL7564CRE-T7 28-Pin HTSSOP 7” MDP0048
EL7564CRE-T13 28-Pin HTSSOP 13” MDP0048
EL7564CREZ (See Note)
EL7564CREZ-T7 (See Note)
EL7564CREZ-T13 (See Note)
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
20-Pin SO (0.300”)
(Pb-free)
20-Pin SO (0.300”)
(Pb-free)
28-Pin HTSSOP
(Pb-free)
28-Pin HTSSOP
(Pb-free)
28-Pin HTSSOP
(Pb-free)
REEL
13” MDP0027
7” MDP0048
13” MDP0048
PKG. DWG.
#
- MDP0027
- MDP0048
2
FN7297.3
May 9, 2005
EL7564
Absolute Maximum Ratings (T
Supply Voltage between V V
Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VIN +0.3V
LX
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V, V
V
Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V, V
HI
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = T
or VDD and GND . . . . . . . . . . . . +6.5V
IN
DC Electrical Specifications V
= 25°C)
A
DD
DD
LX
= V
= 5V, TA = TJ = 25°C, C
IN
+0.3V
+6.5V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Operating Ambient Temperature . . . . . . . . . . . . . . . . -40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . +135°
A
= 1.2nF, Unless Otherwise Specified.
OSC
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
V
REF
V
REFTC
V
REFLOAD
V
RAMP
I
OSC_CHG
I
OSC_DIS
I
VDD+VDRV
IVDD_OFF V
V
DD_OFF
V
DD_ON
T
OT
T
HYS
I
LEAK
I
LMAX
R
DSON
R
DSONTC
I
STP
I
STN
Reference Accuracy 1.24 1.26 1.28 V
Reference Temperature Coefficient 50 ppm/°C
Reference Load Regulation 0 < I
< 50µA -1 %
REF
Oscillator Ramp Amplitude 1.15 V
Oscillator Charge Current 0.1V < V
Oscillator Discharge Current 0.1V < V
VDD+V
DD
Supply Current VEN = 4V, F
DRV
Standby Current EN = 0 1 1.5 mA
< 1.25V 200 µA
OSC
< 1.25V 8 mA
OSC
= 120kHz 2 3.5 5 mA
OSC
VDD for Shutdown 3.5 3.9 V
VDD for Startup 44.35V
Over Temperature Threshold 135 °C
Over Temperature Hysteresis 20 °C
Internal FET Leakage Current EN = 0, LX = 5V (low FET), LX = 0V (high FET) 10 µA
Peak Current Limit 5 A
FET On Resistance Wafer level test only 30 60 m
R
Tem p c o 0.2 m/°C
DSON
Auxiliary Supply Tracking Positive Input Pull Down Current
Auxiliary Supply Tracking Negative
V
V
STP
STN
= V
/ 2 -4 2.5 µA
IN
= V
/ 2 2.5 4 µA
IN
Input Pull Up Current
V
PGP
V
PGN
V
PG_HI
V
PG_LO
V
OVP
V
FB
Positive Power Good Threshold With respect to target output voltage 6 14 %
Negative Power Good Threshold With respect to target output voltage -14 -6 %
Power Good Drive High I
= +1mA 4 V
PG
Power Good Drive Low IPG = -1mA 0.5 V
Over Voltage Protection 10 %
Output Initial Accuracy (EL7564CM) I
Output Initial Accuracy
= 0A 0.960 0.975 0.99 V
LOAD
0.977 0.992 1.007 V
(EL7564CRE)
V
FB_LINE
V
FB_LOAD
V
FB_TC
I
FB
V
EN_HI
V
EN_LO
I
EN
Output Line Regulation V
Output Load Regulation 0.5A < I
Output Temperature Stability -40°C < TA < 85°C, I
Feedback Input Pull Up Current V
= 5V, ∆VIN = 10%, I
IN
< 4A 0.5 %
LOAD
LOAD
= 0V 100 200 nA
FB
= 0A 0.5 %
LOAD
= 2A ±1 %
EN Input High Level 3.2 4 V
EN Input Low Level 1 V
Enable Pull Up Current VEN = 0 -4 -2.5 µA
3
FN7297.3
May 9, 2005
EL7564
Closed-Loop AC Electrical Specifications V
= V
= 5V, TA = TJ = 25°C, C
S
IN
= 1.2nF, Unless Otherwise Specified.
OSC
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
F
OSC
t
SYNC
M
SS
t
BRM
t
LEB
D
MAX
Oscillator Initial Accuracy 105 117 130 kHz
Minimum Oscillator Sync Width 25 ns
Soft Start Slope 0.5 V/ms
FET Break Before Make Delay 15 ns
High Side FET Minimum On Time 150 ns
Maximum Duty Cycle 95 %
Typical Application Diagrams (Continued)
EL7654
(28-PIN HTSSOP)
TOP VIEW
C5
0.1µF
1
VREF
C4
390pF
R4
22
C2
2.2nF
V
IN
5V
C3
0.22µF
2
3
4
5
6
7
8
SGND
COSC
VDD
VTJ
PGND
PGND
PGND
EN
FB
PG
VDRV
VHI
LX
LX
LX
28
27
26
25
24
23
22
21
C6 D1
0.22µF
L1
4.7µH
C7 R2 C10
330µF
2.37k
V
OUT
3.3V, 4A
100pF
PGND
330µF
9
VIN
10
11
VIN
12
NC
STP
13
STN
4
LX
LX
LX
NC
PGND
PGND
20
19
18
17
16
1514
R1 1k
FN7297.3
May 9, 2005
Pin Descriptions
EL7564
20-PIN SO
(0.300”)
28-PIN
HTSSOP PIN NAME PIN FUNCTION
1 1 VREF Bandgap reference bypass capacitor; typically 0.1µF to SGND
2 2 SGND Control circuit negative supply or signal ground
3 3 COSC Oscillator timing capacitor (see performance curves)
4 4 VDD Control circuit positive supply; normally connected to VIN through an RC filter
5 5 VTJ Junction temperature monitor; connected with 2.2nF to 3.3nF to SGND
6, 7 6, 7, 8, 9 PGND Ground return of the regulator; connected to the source of the low-side synchronous NMOS
power FET
8 10, 11 VIN Power supply input of the regulator; connected to the drain of the high-side NMOS power FET
9 13 STP Auxiliary supply tracking positive input; tied to regulator output to synchronize start up with a
second supply; leave open for stand alone operation; 2µA internal pull down current
10 14 STN Auxiliary supply tracking negative input; connect to output of a second supply to synchronize
start up; leave open for stand alone operation; 2µA internal pull up current
11, 12, 13 15, 16 PGND Ground return of the regulator; connected to the source of the low-side synchronous NMOS
power FET
14, 15 18, 19, 20, 21,
22, 23
LX Inductor drive pin; high current output whose average voltage equals the regulator output
voltage
16 24 VHI Positive supply of high-side driver; boot strapped from VDRV to LX with an external 0.22µF
capacitor
17 25 VDRV Positive supply of low-side driver and input voltage for high side boot strap
18 26 PG Power good window comparator output; logic 1 when regulator output is within ±10% of target
output voltage
19 27 FB Voltage feedback input; connected to external resistor divider between VOUT and SGND; a
125nA pull-up current forces VOUT to SGND in the event that FB is floating
20 28 EN Chip enable, active high; a 2µA internal pull up current enables the device if the pin is left open;
a capacitor can be added at this pin to delay the start of converter
Typical Performance Curves
VIN=5V
100
95
90
85
80
75
EFFICIENCY (%)
70
65
60
043.532.5210.5 1.5
FIGURE 1. EL7564CM EFFICIENCY FIGURE 2. EL7564CRE EFFICIENCY
VO=2.8V
VO=1.8V
LOAD CURRENT I
5
O
(A)
VO=3.3V
VIN=5V
100
95
90
85
80
75
EFFICIENCY (%)
70
65
60
0.1 0.6 1.1 1.6 2.1 2.6 3.1 3.6 4.1
VO=2.5V
(A)
I
O
VO=3.3V
VO=1.8V
FN7297.3
May 9, 2005
EL7564
Typical Performance Curves (Continued)
VIN=5V
2
1.6
1.2
0.8
POWER LOSS (W)
0.4
0
043.532.5210.5 1.5
OUTPUT CURRENT I
VO=3.3V
VO=2.8V
(A)
O
VO=1.8V
FIGURE 3. EL7564CM TOTAL CONVERTER POWER LOSS FIGURE 4. EL7564CRE TOTAL CONVERTER POWER LOSS
1.8
1.6
1.4
I
O
VO=3.3V
(A)
1.2
1
(W)
0.8
LOSS
P
0.6
0.4
0.2
0
00.511.522.533.54
VO=1.8V
=3.3V
V
O
3.325
3.315
3.305
3.295
OUTPUT VOLTAGE (V)
3.285
3.275
0.5 43.532.51.512
LOAD CURRENT I
VIN=5.5V
VIN=5V
VIN=4.5V
(A)
O
VO=3.3V
1.5
1
0.5
0
(V) (%)
O
V
-0.5
-1
-1.5 01234
VIN=4.5V
VIN=5V
VIN=5.5V
I
(A)
O
FIGURE 5. EL7564CM LOAD REGULATION FIGURE 6. EL7564CRE LOAD REGULATION
CONDITION:
EL7564RE THERMAL PAD SOLDERED TO 2-LAYER TEST CONDITION: CHIP IN THE CENTER OF COPPER AREA
50
46
42
38
34
THERMAL RESISTANCE (°C/W)
30
141.5 2.5 3.5
PCB COPPER HEAT-SINKING AREA (in
FIGURE 7. EL7564CM θ
WITH 100 LFPM AIRFLOW
1 OZ. COPPER PCB USED
23
JA
WITH NO AIRFLOW
2
)
vs COPPER AREA FIGURE 8. EL7564CRE THERMAL RESISTANCE vs PCB
PCB WITH 0.039” THICKNESS AND 1 OZ. COPPER
ON BOTH SIDES
50
45
40
(°C/W)
JA
35
θ
30
25
11.5 33.54
22.5
PCB AREA (in
2
AREA - NO AIRFLOW
)
6
FN7297.3
May 9, 2005
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