intersil EL7156 DATA SHEET

®
www.BDTIC.com/Intersil
Data Sheet May 2, 2007
High Performance Pin Driver
The EL7156 high performance pin driver with three-state is suited to many ATE and level-shifting applications. The 3.5A peak drive capability makes this part an excellent choice when driving high capacitance loads.
The output pin OUT is connected to input pins VH or VL respectively, depending on the status of the IN pin. When the OE pin is active low, the output is placed in the three-state mode. The isolation of the output FETs from the power supplies enables VH and VL to be set independently, enabling level-shifting to be implemented. Related to the EL7155, the EL7156 adds a lower supply pin VS- and makes VL an isolated and independent input. This feature adds applications flexibility and improves switching response due to the increased enhancement of the output FETs.
This pin driver has improved performance over existing pin drivers. It is specifically designed to operate at voltages down to 0V across the switch elements while maintaining good speed and ON-resistance characteristics.
Available in the 8 Ld SOIC and 8 Ld PDIP packages, the EL7156 is specified for operation over the full -40°C to +85°C temperature range.
Pinout
EL7156
(8 LD PDIP, SOIC)
TOP VIEW
VS+
OE
GND
1
L O
2
G
IN
I
3
C
4
8
VH
OUT
7
VL
6
VS-
5
FN7280.3
Features
• Clocking speeds up to 40MHz
• 15ns t
at 2000pF C
R/tF
LOAD
• 0.5ns rise and fall times mismatch
• 0.5ns t
ON-tOFF
prop delay mismatch
• 3.5pF typical input capacitance
• 3.5A peak drive
• Low ON-resistance of 3.5Ω
• High capacitive drive capability
• Operates from 4.5V to 16.5V
• Pb-free plus anneal available (RoHS compliant)
Applications
• ATE/burn-in testers
• Level shifting
•IGBT drivers
• CCD drivers
Ordering Information
PART
PART NUMBER
EL7156CN EL7156CN - 8 Ld PDIP MDP0031 EL7156CNZ
(Note) EL7156CS 7156CS - 8 Ld SOIC MDP0027 EL7156CS-T7 7156CS 7” 8 Ld SOIC MDP0027 EL7156CS-T13 7156CS 13” 8 Ld SOIC MDP0027 EL7156CSZ
(Note) EL7156CSZ-T7
(Note) EL7156CSZ-T13
(Note)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
*Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
MARKING
EL7156CN Z - 8 Ld PDIP*
7156CSZ - 8 Ld SOIC
7156CSZ 7” 8 Ld SOIC
7156CSZ 13” 8 Ld SOIC
TA PE &
REEL PACKAGE
(Pb-free)
(Pb-free)
(Pb-free)
(Pb-free)
PKG.
DWG. #
MDP0031
MDP0027
MDP0027
MDP0027
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2005, 2007. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL7156
www.BDTIC.com/Intersil
Absolute Maximum Ratings (T
Supply Voltage (VS+ to VS-) . . . . . . . . . . . . . . . . . . . . . . . . . . .+18V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 200mA
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: T
Electrical Specifications V
PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT
INPUT
V
IH
I
IH
V
IL
I
IL
C
IN
R
IN
OUTPUT
R
OVH
R
OVL
I
OUT
I
PK
I
DC
POWER SUPPLY
I
S
I
VH
SWITCHING CHARACTERISTICS
t
R
t
F
t
RFΔ
t
d-1
t
d-2
t
dΔ
t
d-3
t
d-4
Logic ‘1’ Input Voltage 2.4 V Logic ‘1’ Input Current VIH = VS+0.110µA Logic ‘0’ Input Voltage 0.8 V Logic ‘0’ Input Current VIL = 0V 0.1 10 µA Input Capacitance 3.5 pF Input Resistance 50 MΩ
ON-Resistance VH to OUT I ON-Resistance VL to OUT I Output Leakage Current OE = 0V, OUT = VH/V Peak Output Current
(linear resistive operation)
Continuous Output Current Source/Sink 200 mA
Power Supply Current Inputs = VS+1.33mA Off Leakage at VH and V
Rise Time CL = 2000pF 14.5 ns Fall Time CL = 2000pF 15 ns tR, tF Mismatch CL = 2000pF 0.5 ns Tur n-Off Delay Time CL = 2000pF 9.5 ns Turn-On Delay Time CL = 2000pF 10 ns t
Mismatch CL = 2000pF 0.5 ns
d-1-td-2
Three-state Delay Enable 10 ns Three-state Delay Disable 10 ns
= +25°C) Thermal Information
A
- -0.3V, VS +0.3V
S
= TC = T
J
+ = +15V, VH = +15V, VL = 0V, VS- = 0V, TA = +25°C, unless otherwise specified.
S
OUT OUT
Source 3.5 A Sink 3.5 A
L
VH, VL = 0V 4 1 0 µA
A
= -200 mA 2.7 4.5 Ω = +200 mA 3.5 5.5 Ω
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see curves
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
L
0.1 10 µA
2
FN7280.3
May 2, 2007
EL7156
www.BDTIC.com/Intersil
Electrical Specifications V
PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT
INPUT
V
IH
I
IH
V
IL
I
IL
C
IN
R
IN
OUTPUT
R
OVH
R
OVL
I
OUT
I
PK
I
DC
POWER SUPPLY
I
S
V
H
SWITCHING CHARACTERISTICS
t
R
t
F
t
RFΔ
t
d-1
t
d-2
t
dΔ
t
d-3
t
d-4
Logic ‘1’ Input Voltage 2.0 V Logic ‘1’ Input Current VIH = VS+0.110µA Logic ‘0’ Input Voltage 0.8 V Logic ‘0’ Input Current VIL = 0V 0.1 10 µA Input Capacitance 3.5 pF Input Resistance 50 MΩ
ON-Resistance VH to OUT I ON-Resistance VL to OUT I Output Leakage Current OE = 0V, OUT = VH/V Peak Output Current
(linear resistive operation)
Continuous Output Current Source/Sink 200 mA
Power Supply Current Inputs = VS+12.5mA Off Leakage at VH and V
Rise Time CL = 2000pF 17 ns Fall Time CL = 2000pF 17 ns tR, tF Mismatch CL = 2000pF 0 ns Turn-Off Delay Time CL = 2000pF 11.5 ns Turn-On Delay Time CL = 2000pF 12 ns t
Mismatch CL = 2000pF 0.5 ns
d-1-td-2
Three-state Delay Enable 10 ns Three-state Delay Disable 10 ns
+ = +5V, VH = +5V, VL = -5V, VS- = -5V, TA = +25°C, unless otherwise specified. (Continued)
S
= -200mA 3.4 5 Ω
OUT
= +200mA 4 6 Ω
OUT
L
Source 3.5 A Sink 3.5 A
L
VH, VL = 0V 4 10 µA
0.1 10 µA
3
FN7280.3
May 2, 2007
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