The EL5611 and EL5811 are low
power, high voltage rail-to-rail inputoutput amplifiers targeted primarily at
V
applications in TFT-LCD displays. The EL5611
COM
contains six amplifiers, and the EL5811 contains eight
amplifier s . Operating on supplies ranging from 5V to 15V,
while consuming only 2.5mA per am plifier, the EL5611 and
EL5811 have a bandwidth of 60MHz (-3dB). They also
provide common mode input ability beyond the supply rail s,
as well as rail-to-rail output capability. This enables these
amplifiers to offer maximum dynamic range at any supply
voltage.
The EL5611 and EL5811 also feature fast slewing and
settling times, as well as a high output drive capability of
65mA (sink and source). In addition to V
applications,
COM
these features make these amplifiers ideal for high speed
filtering and signal conditioning application. Other
applications include battery power, portable devices, and
anywhere low power consumption is important.
The EL5611 is available in 8-pin MSOP and 8-pin HMSOP
packages. The EL5811 is available in space-saving 28-pin
HTSSOP packages.These amplifiers operate over a
temperature range of -40°C to +85°C.
NOTE: Intersil Pb-free products employ spec ial Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C
CAUTION: Stresses above those li sted in “Abs olute Maxi mum Ratings” may cause perman ent damag e to the device. T his is a stress on ly rating an d operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/M ax specific ation s are g uarant eed. Typical values ar e for in format ion p urpose s only. Unless otherwi se note d, all tests
are at the specified temperature and are pulsed tests, therefore: T
Electrical SpecificationsV
+ = +5V, VS- = -5V, RL = 1kΩ to 0V, TA = 25°C, Unless Otherwise Specified
S
= TC = T
J
A
PARAMETERDESCRIPTIONCONDITIONSMINTYPMAXUNIT
INPUT CHARACTERISTICS
V
OS
TCV
I
B
R
IN
C
IN
OS
Input Offset VoltageV
Average Offset Voltage Drift (Note 1)7µV/°C
Input Bias CurrentV
Input Impedance1GΩ
Input Capacitance2pF
= 0V315mV
CM
= 0V260nA
CM
CMIRCommon-Mode Input Range-5.5+5.5V
CMRRCommon-Mode Rejection Ratiofor V
A
FIGURE 17. CLOSED LOOP OUTPUT IMPEDANCEFIGURE 18. MAXIMUM OUTPUT SWING vs FREQUENCY
L
8
Typical Performance Curves (Continued)
EL5611, EL5811
-15
-25
-35
-45
CMRR (dB)
-55
-65
1K10K100M1M10M
100K
FREQUENCY (Hz)
FIGURE 19. CMRRFIGURE 20. PSRR
1K
100
10
VOLTAGE NOISE (nV/√Hz)
1
1001K100M1M10M100K10K
FREQUENCY (Hz)
-80
PSRR-
-60
-40
PSRR (dB)
-20
VS=±5V
=25°C
T
A
0
1001K10M100K1M10K
-60
DUAL MEASURED CH A TO B
QUAD MEASURED CH A T O D OR B T O C
-80
OTHER COMBINATIONS YIELD
IMPROVED REJECTION
-100
-120
XTALK (dB)
-140
-160
1K10K10M
PSRR+
FREQUENCY (Hz)
FREQUENCY (Hz)
VS=±5V
R
=1kΩ
L
=1
A
V
=110mV
V
IN
1M100K
RMS
30M
FIGURE 21. INPUT VOLTAGE NOISE SPECTRAL DENSITYFIGURE 22. CHANNEL SEPARATION
100
VS=±5V
=1
A
V
R
=1kΩ
80
L
=±50mV
V
IN
=25°C
T
A
60
40
OVERSHOOT (%)
20
0
101K100
LOAD CAPACITANCE (pF)
FIGURE 23. SMALL-SIGNAL OVERSHOOT vs LOAD
5
VS=±5V
4
=1
A
V
R
=1kΩ
3
L
2
1
0
-1
STEP SIZE (V)
-2
-3
-4
-5
65557510595
SETTLING TIME (ns)
85
FIGURE 24. SETTLING TIME vs STEP SIZE
CAPACITANCE
9
0.1%
0.1%
Typical Performance Curves (Continued)
EL5611, EL5811
1V STEP
50ns/DIV
VS=±5V
=25°C
T
A
=1
A
V
R
=1kΩ
L
100mV STEP
50ns/DIV
VS=±5V
=25°C
T
A
=1
A
V
R
=1kΩ
L
FIGURE 25. LARGE SIGNAL TRANSIENT RESPONSEFIGURE 26. SMALL SIGNAL TRANSIENT RESPONSE
Pin Descriptions
EL5611EL5811NAMEFUNCTIONEQUIVALENT CIRCUIT
1, 5, 9, 14, 20, 234, 5, 10, 11, 17,
18, 25, 26
VOUTxAmplifiers output
GND
CIRCUIT 1
V
S+
V
S-
2, 3, 6, 7, 9, 10,
15, 16, 21, 22
2, 3, 6, 7, 8, 9, 12.
13, 15, 16, 19, 20,
VINxAmplifiers input
23, 24, 27, 28
8, 241, 14VS+Positive power supply
24, 1721, 22VS-Negative power supply
12, 13NCNot connected
CIRCUIT 2
V
S+
V
S-
10
P
P
EL5611, EL5811
Applications Information
Product Description
The EL5611 and EL5811 voltage feedback amplifiers are
fabricated using a h igh v oltage CMOS process. They exhibit
rail-to-rail input and output capability, are unity gain stable
and have low power consumption (2.5mA per amplifier).
These features make the EL5611, and EL5811 ideal for a
wide range of general-purpose applications. Connected in
voltage follower m ode and dri ving a lo ad of 1kΩ, the EL5611
and EL5811 have a -3dB bandwidth of 60MHz while
maintaining a 75V/µs slew rate. The EL5611 a six channel
amplifier, and the EL5811 an 8 channel amplifier.
Operating Voltage, Input, and Output
The EL5611and EL5811 are specified with a single nominal
supply voltage from 5V to 15V or a split supply with its total
range from 5V to 15V. Correct operation is guaranteed for a
supply range of 4.5V to 16.5V. Most EL5611 and EL5811
specifications are stable over both the full supply range and
operating temperatures of -40°C to +85°C. Parameter
variations with operating voltage and/or temperature are
shown in the typical performance curves.
The input common-mode voltage range of the EL5611 and
EL5811 extends 500mV beyond the supply rails. The output
swings of the EL5611 and EL5811 typically extend to within
100mV of positive and negative supply rails with load
currents of 5mA. Decreasing load currents will extend the
output voltage range even closer to the supply rails. Figure
27 shows the input and output waveforms for the device in
the unity-gain configuration. Operation is from ±5V supply
with a 1kΩ load connected to GND. The input is a 10V
sinusoid. The output voltage is approximately 9.8V
VS = ±5V, TA = 25°C, AV = 1, VIN = 10V
5V10µs
P-P
P-P
P-P
.
continuous current never exceeds ±65mA . This limit is se t by
the design of the internal metal interconnects.
Output Phase Reversal
The EL5611 and EL5811 are immune to phase reversal as
long as the input voltage is limited from V
- -0.5V to VS+
S
+0.5V. Figure 28 shows a photo of the output of the device
with the input voltage driven beyond the supply rails.
Although the device's output will not change phase, the
input's overvoltage should be avoided. If an input voltage
exceeds supply voltage by more than 0.6V, electrostatic
protection diodes placed in the input stage of the device
begin to conduct and overvoltage damage could occur.
V
= ±2.5V, TA = 25°C, AV = 1, VIN = 6V
S
1V10µs
1V
FIGURE 28. OPERATION WITH BEYOND-THE-RAILS INPUT
P-P
Power Dissipation
With the high-output drive capability of the EL5611 and
EL5811 amplifiers, it is possible to exceed the 125°C
'absolute-maxi mu m j unc tio n te mp erature' under certain load
current conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if load conditions need to be modified for the
amplifier to remain in the safe operating area.
The maximum power dissipation allowed in a package is
determined accordin g to:
T
–
JMAXTAMAX
DMAX
-------------------------------------------- -=
Θ
JA
where:
5V
FIGURE 27. OPERATION WITH RAIL -TO-RAIL I NPUT AND
OUTPUT
OUTPUTINPUT
Short Circuit Current Limit
The EL5611 and EL5811 will limit the short circuit current to
±180mA if t he o utp ut i s di rec tly sh orte d to the pos iti ve or th e
negative supply. If an output is shorted indefi nitely , the power
dissipation could easily increase such that the device may
be damaged. Maximum reliability is maintained if the output
•T
•T
• Θ
•P
= Maximum junction temperature
JMAX
= Maximum ambient tempera ture
AMAX
= Thermal resistance of the package
JA
= Maximum power dissipation in the package
DMAX
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
DMAX
ΣiV[
SISMAXV(S
+V
OUT
i) I
LOAD
i×–+×]=
11
P
EL5611, EL5811
when sourcing, and:
DMAX
ΣiV[
SISMAXV(OUT
when sinking,
where:
• i = 1 to 6 for EL5611 and 1 to 8 for EL5811
•V
= Total supply voltage
S
•I
•V
•I
If we set the two P
can solve for R
= Maximum supply current per amplifier
SMAX
i = Maximum output voltage of the application
OUT
i = Load current
LOAD
equations equal to each other, we
DMAX
i to avoid device overheat. Figures 29
LOAD
and 30 provide a convenient way to see if the device will
overheat. The maximum safe power dissipation can be
found graphically, based on the package type and the
ambient temperature. By using the prev ious equation, it is a
simple matter to see if P
DMAX
derating curves. To ensure proper operation, it is important
to observe the recommended deratin g curves shown in
Figures 29 & 30.
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - HTSSOP
EXPOSED DIEPAD SOLDERED TO PCB PER
JESD51-5
3.5
3
3.030W
2.5
2
1.5
1
POWER DISSIPATION (W)
0.5
0
0255075100150
3.333W
HTSSOP24
θJA=33°C/W
AMBIENT TEMPERATURE (°C)
iVS-) I
LOAD
i×–+×]=
exceeds the device's powe r
HTSSOP28
θJA=30°C/W
12585
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1
0.9
0.8
833mW
0.7
0.6
0.5
0.4
0.3
0.2
POWER DISSIPATION (W)
0.1
0
0255075100150
FIGURE 30. PACKAGE POWER DISSIP A TION vs AMBIENT
TEMPERATURE
909mW
HTSSOP28
θJA=110°C/W
HTSSOP24
θJA=120°C/W
85
AMBIENT TEMPERATURE (°C)
125
Unused Amplifiers
It is recommended that any unused amplifiers in a dual and
a quad package be configured as a unity gain follower. The
inverting input should be directly connected to the output
and the non-inverting input tied to the ground plane.
Power Supply Bypassing and Printed Circuit
Board Layout
The EL561 1 and EL5811 can provide gain at high frequency.
As with any high-frequency device, good pri nted circui t
board layout is necessary for optimum pe rformance. Ground
plane construction is highly recommended, lead lengths
should be as short as possible and the power supply pins
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the V
connected to ground, a 0.1µF ceramic capacitor should be
placed from V
+ to pin to VS- pin. A 4.7µF tantalum
S
capacitor sho uld the n be co nne cted in parallel, placed in the
region of the amplifier. One 4.7µF capacitor may be used for
multiple devices . This sam e capacito r combinati on should be
placed at each supply pin to ground if spl it supplies are to be
used.
- pin is
S
FIGURE 29. PACKAGE POWER DISSIP A TION vs AMBIENT
TEMPERATURE
All Intersil U.S. products are manufa ct ured , asse mbled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Inters il Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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