®
EL5170, EL5370
Data Sheet May 7, 2007
100MHz Differential Twisted-Pair Drivers
The EL5170 and EL5370 are single and triple high bandwidth
amplifiers with a fixed gain of 2. They are primarily targeted for
applications such as driving twisted-pair lines in component
video applications. The inputs signal can be in either singleended or differential form but the outputs are always in
differential form.
The output common mode level for each channel is set by
the associated V
pin, which have a -3dB bandwidth of
REF
over 70MHz. Generally, these pins are grounded but can be
tied to any voltage reference.
All outputs are short circuit protected to withstand temporary
overload condition.
The EL5170 and EL5370 are specified for operation over the
full -40°C to +85°C temperature range.
Pinouts
EL5170
(8 LD SOIC, MSOP)
TOP VIEW
1
IN+
EN
IN-
REF
+
2
-
3
4
8
7
6
5
OUT+
VS-
VS+
OUT-
EN
INP1
INN1
REF1
NC
INP2
INN2
REF2
NC
INP3
INN3
REF3
EL5370
(24 LD QSOP)
TOP VIEW
1
+
-
2
3
4
5
6
7
+
-
8
9
10
+
-
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OUT1
OUT1B
NC
VSP
VSN
NC
OUT2
OUT2B
NC
OUT3
OUT3B
NC
FN7309.7
Features
• Fully differential inputs and outputs
• Differential input range ±2.3V typ.
• 100MHz 3dB bandwidth at fixed ga i n of 2
• 1 100V/µs slew rate
• Single 5V or dual ±5V supplies
• 50mA maximum output current
• Low power - 7.4mA per channel
• Pb-free plus anneal available (RoHS compliant)
Applications
• Twisted-pair drivers
• Differential line drivers
• VGA over twisted-pairs
• ADSL/HDSL drivers
• Single ended to differential amplification
• Transmission of analog signals in a noisy environment
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
Copyright © Intersil Americas Inc. 2002, 2003, 2004, 2006, 2007. All Rights Reserved.
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
EL5170, EL5370
Ordering Information
PART NUMBER PART MARKING TAPE & REEL PACKAGE PKG. DWG. #
EL5170IS 5170IS - 8 Ld SOIC (150 mil) MDP0027
EL5170IS-T7 5170IS 7” 8 Ld SOIC (150 mil) MDP0027
EL5170IS-T13 5170IS 13” 8 Ld SOIC (150 mil) MDP0027
EL5170ISZ (Note) 5170ISZ - 8 Ld SOIC (150 mil) (Pb-free) MDP0027
EL5170ISZ-T7 (Note) 5170ISZ 7” 8 Ld SOIC (150 mil) (Pb-free) MDP0027
EL5170ISZ-T13 (Note) 5170ISZ 13” 8 Ld SOIC (150 mil) (Pb-free) MDP0027
EL5170IY g - 8 Ld MSOP (3.0mm) MDP0043
EL5170IY-T7 g 7” 8 Ld MSOP (3.0mm) MDP0043
EL5170IY-T13 g 13” 8 Ld MSOP (3.0mm) MDP0043
EL5170IYZ (Note) BAAVA - 8 Ld MSOP (3.0mm) (Pb-free) MDP0043
EL5170IYZ-T7 (Note) BAAVA 7” 8 Ld MSOP (3.0mm) (Pb-free) MDP0043
EL5170IYZ-T13 (Note) BAAVA 13” 8 Ld MSOP (3.0mm) (Pb-free) MDP0043
EL5370IU EL5370IU - 24 Ld QSOP (150 mil) MDP0040
EL5370IU-T7 EL5370IU 7” 24 Ld QSOP (150 mil) MDP0040
EL5370IU-T13 EL5370IU 13” 24 Ld QSOP (150 mil) MDP0040
EL5370IUZ (Note) EL5370IUZ - 24 Ld QSOP (150 mil) (Pb-free) MDP0040
EL5370IUZ-T7 (Note) EL5370IUZ 7” 24 Ld QSOP (150 mil) (Pb-free) MDP0040
EL5370IUZ-T13 (Note) EL5370IUZ 13” 24 Ld QSOP (150 mil) (Pb-free) MDP0040
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2
FN7309.7
May 7, 2007
EL5170, EL5370
Absolute Maximum Ratings (T
Supply Voltage (VS+ to VS-) . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6V
Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60mA
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
= +25°C) Thermal Information
A
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
Recommended Operating Temperature . . . . . . . . . .-40°C to +85°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for informati on purposes only. Unles s otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T
Electrical Specifications V
+ = +5V, VS- = -5V, TA = +25°C, VIN = 0V, AV = 2, RLD = 200Ω, CLD = 1pF, Unless Otherwise Specified.
S
= TC = T
J
A
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
BW -3dB Bandwidth 100 MHz
BW ± 0.1dB Bandwidth 12 MHz
SR Slew Rate V
T
STL
T
OVR
V
BW (-3dB) V
REF
V
SR+ V
REF
V
SR- V
REF
V
N
Settling Time to 0.1% V
Output Overdrive Recovery time 40 ns
-3dB Bandwidth AV =1, CLD = 2.7pF 70 MHz
REF
Slew Rate - Rise V
REF
Slew Rate - Fall V
REF
Input Voltage Noise f = 10kHz 28 nV/√Hz
HD2 Second Harmonic Distortion V
HD2 Second Harmonic Distortion V
HD3 Third Harmonic Distortion V
HD3 Third Harmonic Distortion V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
= 2V
, 20% to 80% 800 1100 V/µs
P-P
= 2V
P-P
= 2V
, 20% to 80% 125 V/µs
P-P
= 2V
, 20% to 80% 65 V/µs
P-P
= 2V
, 1MHz -79 dBc
P-P
= 2V
, 10MHz -65 dBc
P-P
= 2V
, 1MHz -62 dBc
P-P
= 2V
, 10MHz -43 dBc
P-P
20 ns
dG Differential Gain at 3.58MHz RLD = 300Ω, AV = 2 0.14 %
dθ Differential Phase at 3.58MHz R
e
S
Channel Separation - For EL5370 only at f = 1MHz 85 dB
= 300Ω, AV = 2 0.38 °
LD
INPUT CHARACTERISTICS
V
OS
I
IN
I
REF
Gain Gain Accuracy V
R
IN
C
IN
Input Referred Offset Voltage ±6 ±25 mV
Input Bias Current (VIN, V
Input Bias Current at REF Pin V
) -10 -6 -2 µA
INB
= +3.2V 0.5 1.25 3 µA
REF
V
= -3.2V -1 0 +1 µA
REF
= ±1V 1.98 2 2.02 V
IN
Differential Input Resistance 300 kΩ
Differential Input Capacitance 1pF
DMIR Differential Mode Input Range ±2.1 ±2.3 V
CMIR+ Common Mode Positive Input Range at
V
+, VIN-
IN
CMIR- Common Mode Negative Input Range at
+, VIN-
V
IN
3.2 3.4 V
-4.5 -4.2 V
3
FN7309.7
May 7, 2007
EL5170, EL5370
Electrical Specifications V
+ = +5V, VS- = -5V, TA = +25°C, VIN = 0V, AV = 2, RLD = 200Ω, CLD = 1pF, Unless Otherwise Specified.
S
(Continued)
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
V
REFIN
Reference Input Voltage Range - Positive VIN+ = VIN- = 0V 3.4 3.8 V
Reference Input Voltage Range -
-3.3 -3 V
Negative
V
REFOS
CMRR Input Common Mode Rejection Ratio V
Output Offset Relative to V
REF
-140 60 +140 mV
= ±2.5V 65 84 dB
IN
OUTPUT CHARACTERISTICS
V
OUT
Positive Output Voltage Swing R
= 200Ω 3.3 3.6 V
LD
Negative Output Voltage Swing -3.3 -3 V
I
(Max) Maximum Output Current RL = 10Ω (EL5170) ±50 ±80 mA
OUT
R
= 10Ω (EL5370) ±70 ±85 mA
L
R
OUT
Output Impedance 60 mΩ
SUPPLY
V
SUPPLY
I
S(ON)
I
+ Positive Power Supply Current - Disabled EN pin tied to 4.8V (EL5170) 60 80 100 µA
S(OFF)
I
- Negative Power Supply Current -
S(OFF)
+ Positive Power Supply Current - Disabled EN pin tied to 4.8V (EL5370) 0.5 2 5 µA
I
S(OFF)
I
- Negative Power Supply Current -
S(OFF)
PSRR Power Supply Rejection Ratio V
Supply Operating Range VS+ to VS-4.7511V
Power Supply Current - Per channel 6 7.4 8.4 mA
-150 -120 -90 µA
Disabled
-150 -120 -90 µA
Disabled
from ±4.5V to ±5.5V (EL5170) 70 83 dB
S
VS from ±4.5V to ±5.5V (EL5370) 65 83 dB
ENABLE
t
EN
t
DS
V
IH
Enable Time 200 ns
Disable Time 1µs
EN Pin Voltage for Power-up VS+ -
1.5
V
IL
I
IH-EN
I
IL-EN
EN Pin Voltage for Shut-down VS+ -
0.5
EN Pin Input Current High - per channel At VEN = 5V 40 50 µA
EN Pin Input Current Low - per channel At VEN = 0V -6 -3 µA
V
V
Pin Descriptions
EL5170 EL5370 PIN NAME PIN FUNCTION
1 2, 6, 10 IN+, INP1, 2, 3 Non-inverting inputs
21EN
3 3, 7, 11 IN-, INN1, 2, 3 Inverting inputs
4 4, 8, 12 REF1, 2, 3 Reference input, sets common-mode output voltage
5 14, 17, 23 OUT-, OUT1B, 2B, 3B Inverting outputs
6 21 VS+, VSP Positive supply
7 20 VS-, VSN Negative supply
8 15, 18, 24 OUT+, OUT1, 2, 3 Non-inverting outputs
5, 9, 13, 16, 19, 22 NC No connects, grounded for best crosstalk performance
4
Enable
FN7309.7
May 7, 2007
Connection Diagrams
5
INP
EN
INN
REF
R
50Ω
EL5170
R
S1
50Ω
INP
1
EN
2
INN
3
REF
4
S2
R
50Ω
S3
OUTB
OUT
VSN
VSP
-5V
R
8
7
6
5
+5V
50Ω
R
50Ω
RT2
RT2
LOADP
LOADN
EL5370
OUT1
OUT1B
24
23
EN
1
INP1
2
INN1
3
REF1
4
NC
5
INP2
6
INN2
7
REF2
8
NC
9
INP3
10
INN3
11
REF3
12
R
R
R
R
R
SN2
50Ω
50Ω
May 7, 2007
FN7309.7
SR2
SP3
50Ω
50Ω
SN3
SR3
50Ω
NC
VSP
VSN
NC
OUT2
OUT2B
NC
OUT3
OUT3B
NC
22
21
20
19
18
17
16
15
14
13
Typical Performance Curves
= ±5V, AV = 2, RLD = 200Ω, CLD = 1pF
V
S
10
9
8
7
6
5
GAIN (dB)
4
3
2
1
0
100K
1M
FIGURE 1. FREQUENCY RESPONSE
V
= 2V
OP-P
V
= 1V
OP-P
10M 100M 1G
FREQUENCY (Hz)
V
OP-P
= 200mV
C
= 1pF, V
LD
10
9
8
7
6
5
4
GAIN (dB)
3
2
1
0
100K
= 200mV
ODP-P
R
= 1kΩ
LD
R
= 100Ω
LD
1M 100M 1G
10M
FREQUENCY (Hz)
FIGURE 2. SMALL SIGNAL FREQUENCY RESPONSE vs R
LD
FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE vs C
FIGURE 5. POWER SUPPLY REJECTION RA TIO vs
FREQUENCY
6
LD
FIGURE 4. FREQUENCY RESPONSE vs V
REF
FIGURE 6. COMMON MODE REJECTION vs FREQUENCY
FN7309.7
May 7, 2007
Typical Performance Curves (Continued)
EL5170, EL5370
V
100Ω
ODM
100Ω
V
CM
V
IN
R
T
0
-10
-20
-30
-40
V
BALANCE ERROR (dB)
OCM/VODM
-50
-60
100K 1M 10M 100M
+
-
R
FREQUENCY (Hz)
FIGURE 7. DIFFERENTIAL MODE OUTPUT BALANCE
ERROR vs FREQUENCY
-40
-50
-60
-70
-80
-90
CHANNEL ISOLATION (dB)
-100
-110
100K 1M 10M 100M
CH1<=>CH2
CH2<=>CH1
CH3<=>CH2
CH2<=>CH3
CH3<=>CH1
CH1<=>CH3
FREQENCY (Hz)
FIGURE 9. CHANNEL ISOLATION vs FREQUENCY
1000
100
VOLTAGE NOISE (nV/√Hz)
10
10 100 1K 10K 100K 1M 10M
FREQENCY (Hz)
FIGURE 8. INPUT VOLTAGE NOISE vs FREQUENCY
= 200Ω
R
LD
110
105
100
95
BW (MHz)
90
85
80
4689 12
57 10
V
(V)
S
11
FIGURE 10. BANDWIDTH vs SUPPLY VOLTAGE
7.78
7.76
7.74
7.72
7.7
7.68
(mA)
7.66
S
I
7.64
7.62
7.6
7.58
468911
57 10
IS+
IS-
V
(V)
S
FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE
7
V
= ±5V, RLD = 200Ω, V
S
-30
-40
-50
-60
-70
DISTORTION (dB)
-80
-90
02 6 1012 1820
414
FREQUENCY (MHz)
= 2V
OP-P
HD3
HD2
8
16
FIGURE 12. HARMONIC DISTORTION vs FREQUENCY
FN7309.7
May 7, 2007
Typical Performance Curves (Continued)
EL5170, EL5370
0.5V/DIV
40ns/DIV
FIGURE 13. V
100mV/DIV
TRANSIENT RESPONSE
COM
20ns/DIV
FIGURE 15. SMALL SIGNAL TRANSIENT RESPONSE
500mV/DIV
20ns/DIV
FIGURE 14. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 16. DISABLED RESPONSE
FIGURE 17. ENABLED RESPONSE
8
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.2
1
870mW
0.8
625mW
0.6
0.4
486mW
POWER DISSIPATION (W)
0.2
0
MSOP8
θJA=206°C/W
0 255075100 150
AMBIENT TEMPERATURE (°C)
QSOP24
θJA=115°C/W
SO8
θJA=160°C/W
12585
FIGURE 18. PACKAGE POWER DISSIP A TION vs AMBIENT
TEMPERATURE
FN7309.7
May 7, 2007
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
1.136W
1.2
1
909mW
0.8
870mW
0.6
0.4
POWER DISSIPATION (W)
0.2
0
0 255075100 150
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Simplified Schematic
EL5170, EL5370
QSOP24
θJA=88°C/W
SO8
θJA=110°C/W
MSOP8/10
θJA=115°C/W
12585
AMBIENT TEMPERATURE (°C)
200Ω
VS+
R
R
1
R
FBNFBPIN-IN+
400Ω
2
3
R
C
C
R
5
Description of Operation and Application
Information
Product Description
The EL5170 and EL5370 are wide bandwidth, low power
and single/differential ended to differential output amplifiers.
They have a fixed gain of 2. The EL5170 is a single channel
differential amplifier. The EL5370 is a triple channel
differential amplifier. The EL5170 and EL5370 have a -3dB
bandwidth of 100MHz while driving a 200Ω differential load.
The EL5170 and EL5370 are available with a power down
feature to reduce the power while the amplifiers are
disabled.
R
4
7
R
8
V
B1
V
B2
R
6
-
V
S
200Ω
OUT+
R
CD
R
CD
OUT-
C
C
R
REF
R
10
9
Input, Output and Supply Voltage Range
The EL5170 and EL5370 have been designed to operate
with a single supply voltage of 5V to 10V or a split supplies
with its total voltage from 5V to 10V. The amplifiers have an
input common mode voltage range from -4.5V to 3.4V for
±5V supply. The differential mode input range (DMIR)
between the two inputs is from -2.3V to +2.3V. The input
voltage range at the REF pin is from -3.3V to 3.8V. If the
input common mode or differential mode signal is outside the
above-specified ranges, it will cause the output signal
distorted.
The output of the EL5170 and EL5370 can swing from -3.3V
to 3.6V at 200Ω differential load at ±5V supply. As the load
resistance becomes lower, the output swing is reduced.
9
FN7309.7
May 7, 2007
EL5170, EL5370
Differential and Common Mode Gain Settings
As shown at the simplified schematic, since the feedback
resistors RF and the gain resistor are integrated with 200Ω
and 400Ω, the EL5170 and EL5370 have a fixed gain of 2.
The common mode gain is always one.
Driving Capacitive Loads and Cables
The EL5170 and EL5370 can drive 75pF differential
capacitor in parallel with 200Ω differential load with less than
3.5dB of peaking. If less peaking is desired in applications, a
small series resistor (usually between 5Ω to 50Ω) can be
placed in series with each output to eliminate most peaking.
However, this will reduce the gain slightly.
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor at the
amplifier’s output will isolate the amplifier from the cable and
allow extensive capacitive drive. However, other applications
may have high capacitive loads without a back-termination
resistor. Again, a small series resistor at the output can help
to reduce peaking.
Disable/Power-Down
The EL5170 and EL5370 can be disabled and placed their
outputs in a high impedance state. The turn off time is about
1µs and the turn on time is about 200ns. When disabled, the
amplifier’s supply current is reduced to 2µA for I
120µA for I
- typically, thereby effectively eliminating the
S
+ and
S
power consumption. The amplifier’s power down can be
controlled by standard CMOS signal levels at the ENABLE
pin. The applied logic signal is relative to V
EN
pin float or applying a signal that is less than 1.5V below
V
+ will enable the amplifier. The amplifier will be disabled
S
when the signal at EN
pin is above VS+ -0.5V.
+ pin. Letting the
S
Output Drive Capability
The EL5170 and EL5370 have internal short circuit
protection. Its typical short circuit current is ±80mA. If the
output is shorted indefinitely, the power dissipation could
easily increase such that the part will be destroyed.
Maximum reliability is maintained if the output current never
exceeds ±60mA. This limit is set by the design of the internal
metal interconnect.
Power Dissipation
With the high output drive capability of the EL5170 and
EL5370 it is possible to exceed the 125°C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if the load conditions or package types need to be
modified for the amplifier to remain in the safe operating
area.
The maximum power dissipation allowed in a package is
determined according to:
T
–
JMAXTAMAX
MAX
=
-------------------------------------------- -
Θ
JA
PD
Where:
T
= Maximum junction temperature
JMAX
T
= Maximum ambient temperature
AMAX
θJA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
PD i V
⎛⎞
×=
⎜⎟
⎝⎠
SISMAXVS
×+×
ΔV
------------
R
LD
O
Where:
V
= Total supply voltage
S
I
= Maximum quiescent supply current per channel
SMAX
ΔVO = Maximum differential output voltage of the
application
R
= Differential load resistance
LD
I
= Load current
LOAD
i = Number of channels
By setting the two PD
can solve the output current and R
equations equal to each other, we
MAX
to avoid the device
LOAD
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as sort as possible. The power supply pin
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the V
connected to the ground plane, a single 4.7µF tantalum
capacitor in parallel with a 0.1µF ceramic capacitor from V
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the V
- pin becomes the negative
S
supply rail.
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier’s inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
- pin is
S
S
+
10
FN7309.7
May 7, 2007
Typical Applications
EL5170, EL5370
0Ω
IN+
EL5170/
EL5370
IN-
IN+
IN-
EL5170/
EL5370
50
50
= 100Ω
Z
O
50Ω
50Ω
FIGURE 20. TWISTED PAIR DRIVER
+
-
FIGURE 21. DUAL COAXIAL CABLE DRIVER
V
V
V
V
FB
IN
INB
REF
EL5172/
EL5372
V
FB
V
IN
V
INB
V
REF
0Ω
EL5172/
EL5372
V
V
OUT
OUT
10V
V
IN
IN+
IN-
EL5170/
EL5370
FIGURE 22. SINGLE SUPPLY TWISTED PAIR DRIVER
11
FN7309.7
May 7, 2007
EL5170, EL5370
IN+
EL5170/
EL5370
IN-
FIGURE 23. DUAL SIGNAL TRANSMISSION CIRCUIT
EL5172/
EL5372
EL5172
12
FN7309.7
May 7, 2007
Small Outline Package Family (SO)
A
D
NN
(N/2)+1
EL5170, EL5370
h X 45°
PIN #1
E
C
SEATING
PLANE
0.004 C
E1
B
0.010 BM CA
I.D. MARK
1
e
0.010 BM CA
(N/2)
c
SEE DETAIL “X”
L1
H
A2
GAUGE
PLANE
A1
b
DETAIL X
L
4° ±4°
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SO16
SYMBOL
(0.150”)
A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -
A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -
b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -
c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3
E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -
E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3
e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -
L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -
h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -
N 8 14 16 16 20 24 28 Reference -
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE NOTESSO-8 SO-14
A
0.010
Rev. M 2/07
13
FN7309.7
May 7, 2007
EL5170, EL5370
Quarter Size Outline Plastic Packages Family (QSOP)
E E1
0.010 C A B
C
SEATING
PLANE
0.004 C
A
N
1
B
L1
c
SEE DETAI L "X"
D
PIN #1
I.D. MARK
e
0.007 C A B
(N/2)+1
A
(N/2)
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
INCHES
SYMBOL
A 0.068 0.068 0.068 Max. A1 0.006 0.006 0.006 ±0.002 A2 0.056 0.056 0.056 ±0.004 -
b 0.010 0.010 0.010 ±0.002 -
c 0.008 0.008 0.008 ±0.001 -
D 0.193 0.341 0.390 ±0.004 1, 3
E 0.236 0.236 0.236 ±0.008 -
H
E1 0.154 0.154 0.154 ±0.004 2, 3
e 0.025 0.025 0.025 Basic -
L 0.025 0.025 0.025 ±0.009 -
b
L1 0.041 0.041 0.041 Basic -
N 16 24 28 Reference -
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
TOLERANCE NOTESQSOP16 QSOP24 QSOP28
Rev. F 2/07
A2
A1
DETAIL X
GAUGE
PLANE
L
0.010
4°±4°
14
FN7309.7
May 7, 2007
Mini SO Package Family (MSOP)
M
C
SEATING
PLANE
N LEADS
c
0.25 C A B
E1E
B
0.10 C
L1
SEE DETAIL "X"
D
N
1
e
b
A
(N/2)+1
PIN #1
I.D.
(N/2)
H
M
0.08 C A B
A
EL5170, EL5370
MDP0043
MINI SO PACKAGE FAMILY
SYMBOL
A1.101.10 Max. A1 0.10 0.10 ±0.05 A2 0.86 0.86 ±0.09 -
b 0.33 0.23 +0.07/-0.08 -
c0.180.18 ±0.05 D 3.00 3.00 ±0.10 1, 3
E4.904.90 ±0.15 -
E1 3.00 3.00 ±0.10 2, 3
e0.650.50 Basic -
L0.550.55 ±0.15 -
L1 0.95 0.95 Basic -
N 8 10 Reference -
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
MILLIMETERS
TOLERANCE NOTESMSOP8 MSOP10
Rev. D 2/07
A2
GAUGE
A1
L
DETAIL X
PLANE
3° ±3°
0.25
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15
FN7309.7
May 7, 2007
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