The EL2126 is an ultra-low noise, wideband amplifier that
runs on half the supply current of competitive parts. It is
intended for use in systems such as ultrasound imaging
where a very small signal needs to be amplified by a large
amount without adding significant noise. Its low power
dissipation enables it to be packaged in the tiny SOT-23
package, which further helps systems where many input
channels create both space and power dissipation problems.
The EL2126 is stable for gains of 10 and greater and uses
traditional voltage feedback. This allows the use of reactive
elements in the feedback loop, a common requirement for
many filter topologies. It operates from ±2.5V to ±15V
supplies and is available in the 5 Ld SOT-23 and 8 Ld SO
packages.
The EL2126 is fabricated in Elantec’s proprietary
complementary bipolar process, and is specified for
operation over the full -40°C to +85°C temperature range.
Pinouts
EL2126
(5 LD SOT-23)
TOP VIEW
Features
• Voltage noise of only 1.3nV/√Hz
• Current noise of only 1.2pA/√Hz
• 200µV offset voltage
• 100MHz -3dB BW for A
= 10
V
• Very low supply current - 4.7mA
• SOT-23 package
• ±2.5V to ±15V operation
• Pb-free plus anneal available (RoHS compliant)
Applications
• Ultrasound input amplifiers
• Wideband instrumentation
• Communication equipment
• AGC and PLL active filters
• Wideband sensors
OUT
VS-
NC
IN-
IN+
VS-
1
2
3
1
2
3
4
-+
EL2126
(8 LD SOIC)
TOP VIEW
-
+
5
VS+
4
IN-IN+
NC
8
VS+
7
OUT
6
NC
5
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002, 2005, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Ordering Information
EL2126
PART
NUMBER
EL2126CW-T7G-40 to +857” (3k pcs)5 Ld SOT-23MDP0038
EL2126CW-T7AG-40 to +857” (250 pcs)5 Ld SOT-23MDP0038
EL2126CS2126CS-40 to +85-8 Ld SOIC (150 mil)MDP0027
EL2126CS-T72126CS-40 to +857”8 Ld SOIC (150 mil)MDP0027
EL2126CS-T132126CS-40 to +8513”8 Ld SOIC (150 mil)MDP0027
EL2126CSZ ( Note)2126CSZ-40 to +85-8 Ld SOIC (150 mil)
EL2126CSZ-T7 ( Note)2126CSZ-40 to +857”8 Ld SOIC (150 mil)
EL2126CSZ-T13 ( Note)2126CSZ-40 to +8513”8 Ld SOIC (150 mil)
EL2126CWZ-T7 (Note)BAAH-40 to +857”5 Ld SOT-23 (SC74)
EL2126CWZ-T7A (Note)BAAH-40 to +857”5 Ld SOT-23 (SC74)
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination
finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = T
The EL2126 is an ultra-low noise, wideband monolithic
operational amplifier built on Elantec's proprietary high
speed complementary bipolar process. It features 1.3nV/√Hz
input voltage noise, 200µV typical offset voltage, and 73dB
THD. It is intended for use in systems such as ultrasound
imaging where very small signals are needed to be
amplified. The EL2126 also has excellent DC specifications:
200µV V
specifications allow the EL2126 to be used in DC-sensitive
applications such as difference amplifiers.
Gain-Bandwidth Product
The EL2126 has a gain-bandwidth product of 650MHz at
±5V. For gains less than 20, higher-order poles in the
amplifier's transfer function contribute to even higher closedloop bandwidths. For example, the EL2126 has a -3dB
bandwidth of 100MHz at a gain of 10 and decreases to
33MHz at gain of 20. It is important to note that the extra
bandwidth at lower gain does not come at the expenses of
stability. Even though the EL2126 is designed for gain ≥ 10.
With external compensation, the device can also operate at
lower gain settings. The RC network show n in Figure 50
reduces the feedback gain at high frequency and thus
maintains the amplifier stability. R values must be less than
RF divided by 9 and 1 divided by 2
200MHz.
Choice of Feedback Resistor, RF
The feedback resistor forms a pole with the input
capacitance. As this pole becomes larger, phase margin is
reduced. This increases ringing in the time domain and
peaking in the frequency domain. Therefore, RF has some
maximum value which should not be exceeded for optimum
performance. If a large value of RF must be used, a small
capacitor in the few pF range in parallel with RF can help to
reduce this ringing and peaking at the expense of reducing
the bandwidth. Frequency response curves for various RF
values are shown in the typical performance curves section
of this data sheet.
, 22µA IB, 0.4µA IOS, and 106dB CMRR. These
OS
πRC must be less than
R
F
R
C
V
IN
-
+
FIGURE 50.
V
OUT
Noise Calculations
The primary application for the EL2126 is to amplify very
small signals. To maintain the proper signal-to-noise ratio, it
is essential to minimize noise contribution from the amplifier.
Figure 51 shows all the noise sources for all the components
around the amplifier.
R
V
V
IN+ is the amplifier positive input current noise
I
N
VRX is the thermal noise associated with each resistor:
V
RX
where:
k is Boltzmann's constant = 1.380658 x 10
T is temperature in degrees Kelvin (273 + °C)
The total noise due to the amplifier seen at the output of the
amplifier can be calculated by using the Equation 2.
As the equation shows, to keep noise at a minimum, small
resistor values should be used. At higher amplifier gain
configuration where R
and R
starts to dominate. Because noise is summed in a rootmean-squares method, noise sources smaller than 25% of
the largest noise source can be ignored. This can greatly
simplify the formula and make noise calculation much easier
to calculate.
3
IN
V
R3
IN+
IN-
V
N
+
-
V
R1
R
1
V
R2
R
2
V
ON
FIGURE 51.
is the amplifier input voltage noise
N
- is the amplifier negative input current noise
4kTRx=
-23
is reduced, the noise due to IN-, R2,
decreases and the noise caused by IN+, VN, and R3
1
2
(EQ. 1)
2
V
ON
⎛⎞
BW=VN21
×
⎜⎟
⎝⎠
R
⎛⎞
1
-------
×IN-2R
+
⎜⎟
R
⎝⎠
2
2
1
IN+2R
⎛⎞
2
××+×4KTR14KTR
⎜⎟
3
⎝⎠
2
R
1
-------
1
+
R
2
2
2
R
⎛⎞
1
-------
××××+×××4KTR31
⎜⎟
R
⎝⎠
2
⎛⎞
××××++ +
⎜⎟
⎝⎠
2
R
1
-------
+
R
2
(EQ. 2)
15
FN7046.4
May 2, 2007
EL2126
Output Drive Capability
The EL2126 is designed to drive low impedance load. It can
easily drive 6V
drive capability makes the EL2126 an ideal choice for RF , IF,
and video applications. Furthermore, the EL2126 is
current-limited at the output, allowing it to withstand
momentary short to ground. However, the power dissipation
with output-shorted cannot exceed the power dissipation
capability of the package.
signal into a 100Ω load. This high output
P-P
Driving Cables and Capacitive Loads
Although the EL2126 is designed to drive low impedance
load, capacitive loads will decreases the amplifier's phase
margin. As shown in the performance curves, capacitive
load can result in peaking, overshoot and possible
oscillation. For optimum AC performance, capacitive loads
should be reduced as much as possible or isolated with a
series resistor between 5Ω to 20Ω. When driving coaxial
cables, double termination is always recommended for
reflection-free performance. When properly terminated, the
capacitance of the coaxial cable will not add to the capacitive
load seen by the amplifier.
Power Supply Bypassing And Printed Circuit
Board Layout
As with any high frequency devices, good printed circuit
board layout is essential for optimum performance. Ground
plane construction is highly recommended. Lead lengths
should be kept as short as possible. The power supply pins
must be closely bypassed to reduce the risk of oscillation.
The combination of a 4.7µF tantalum capacitor in parallel
with 0.1µF ceramic capacitor has been proven to work well
when placed at each supply pin. For single supply operation,
where pin 4 (V
4.7µF tantalum capacitor in parallel with a 0.1µF ceramic
capacitor across pins 7 (V
For good AC performance, parasitic capacitance should be
kept to a minimum. Ground plane construction again should
be used. Small chip resistors are recommended to minimize
series inductance. Use of sockets should be avoided since
they add parasitic inductance and capacitance which will
result in additional peaking and overshoot.
-) is connected to the ground plane, a single
S
+) and pin 4 (VS-) will suffice.
S
Supply Voltage Range and Single Supply
Operation
The EL2126 has been designed to operate with supply
voltage range of ±2.5V to ±15V. With a single supply, the
EL2126 will operate from +5V to +30V. Pins 4 and 7 are the
power supply pins. The positive power supply is connected
to pin 7. When used in single supply mode, pin 4 is
connected to ground. When used in dual supply mode, the
negative power supply is connected to pin 4.
As the power supply voltage de creases from +30V to +5V, it
becomes necessary to pay special attention to the input
voltage range. The EL2126 has an input voltage range of
0.4V from the negative supply to 1.2V from the positive
supply. So, for example, on a single +5V supply, the EL2126
has an input voltage range which spans from 0.4V to 3.8V.
The output range of the EL2126 is also quite large, on a +5V
supply, it swings from 0.4V to 3.8V.
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCENOTESSO-8SO-14
A
0.010
Rev. M 2/07
17
FN7046.4
May 2, 2007
EL2126
Small Outline Transistor Plastic Packages (SOT23-5)
D
e1
E
C
L
E1
C
18
FN7046.4
May 2, 2007
SOT-23 Package Family
EL2126
2 3
0.15 DC
2X
C
SEATING
PLANE
E1
5
0.15 A-BC
2X
0.10 C
NX
(L1)
e1
A
6
N
4
D
MDP0038
SOT-23 PACKAGE FAMILY
SYMBOL
MILLIMETERS
TOLERANCESOT23-5SOT23-6
A1.451.45MAX
A10.100.10±0.05
E
A21.141.14±0.15
b0.400.40±0.05
321
e
0.20
B
b
NX
M
0.20 C
2X
DC A-B
c0.140.14±0.06
D2.902.90Basic
E2.802.80Basic
E11.601.60Basic
e0.950.95Basic
e11.901.90Basic
L0.450.45±0.10
L10.600.60Reference
1 3
D
N56Reference
Rev. F 2/07
NOTES:
A2
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
2. Plastic interlead protrusions of 0.25mm maximum per side are not
A1
included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
H
6. SOT23-5 version has no center lead (shown as a dashed line).
A
c
L
0°
GAUGE
PLANE
+3°
-0°
0.25
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implicat ion or oth erwise u nde r any p a tent or p at ent r ights of Intersil or its subsidiari es.
For information regarding Intersil Corporation and its products, see www.intersil.com
19
FN7046.4
May 2, 2007
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