DG506A, DG507A, DG508A, DG509A
Data Sheet November 1999
CMOS Analog Multiplexers
The DG506A, DG507A, DG508A and DG509A are CMOS
Monolithic 16-Channel/Dual 8-Channel and 8-Channel/Dual
4-Channel Analog Multiplexers, which can also be used as
demultiplexers. An enable input is provided. When the
enable input is high, a channel is selected by the address
inputs, and when low, all channels are off.
A channel in the ON state conducts current equally well in
both directions. In the OFF state each channel blocks
voltages up to the supply rails. The address inputs and the
enable input are TTL and CMOS compatible over the full
specified operating temperature range.
The DG506A, DG507A, DG508A and DG509A are pinout
compatible with the industry standard devices.
Ordering Information
TEMP.
PART NUMBER
RANGE (oC) PACKAGE
DG506AAK -55 to 125 28 Ld CERDIP F28.6
DG506ACJ 0 to 70 28 Ld PDIP E28.6
DG506ACY 0 to 70 28 Ld SOIC M28.3
DG507ABK -25 to 85 28 Ld CERDIP F28.6
DG507ACJ 0 to 70 28 Ld PDIP E28.6
DG507ACY 0 to 70 28 Ld SOIC M28.3
PKG.
NO.
File Number 3137.3
Features
• Low Power Consumption
• TTL and CMOS-Compatible Address and Enable Inputs
• 44V Maximum Power Supply Rating
• High Latch-Up Immunity
• Break-Before-Make Switching
• Alternate Source
Applications
• Data Acquisition Systems
• Communication Systems
• Signal Multiplexing/Demultiplexing
• Audio Signal Multiplexing
TEMP.
PART NUMBER
RANGE (oC) PACKAGE
DG508AAK -55 to 125 16 Ld CERDIP F16.3
DG508ABK -25 to 85 16 Ld CERDIP F16.3
DG508ACJ 0 to 70 16 Ld PDIP E16.3
DG509ACJ 0 to 70 16 Ld PDIP E16.3
DG509ACY 0 to 70 16 Ld SOIC M16.3
PKG.
NO.
Pinouts
DG506A (PDIP, CERDIP, SOIC)
TOP VIEW
V+
NC
NC
S
S
S
S
S
S
S
S
GND
NC
A
1
2
3
4
16
5
15
6
14
7
13
8
12
9
11
10
10
11
9
12
13
14
3
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DG507A (PDIP, CERDIP, SOIC)
TOP VIEW
D
VS
S
S
S
S
S
S
S
EN
A
A
A
V+
1
D
2
B
NC
S
8B
S
7B
S
6B
S
5B
S
4B
S
3B
S
2B
S
1B
GND
NC
NC
3
4
5
6
7
8
9
10
11
12
13
14
8
7
6
5
4
3
2
1
0
1
2
1
DG508A (PDIP, CERDIP)
TOP VIEW
D
28
A
V-
27
S
26
8A
S
25
7A
S
24
6A
S
23
5A
S
22
4A
21
S
3A
20
S
2A
19
S
1A
18
EN
A
17
0
A
16
1
A
15
2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
A
0
2
EN
V-
3
S
4
1
S
5
2
S
6
3
S
7
4
D
8
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
16
A
1
A
15
2
14
GND
V+
13
S
12
5
S
11
6
S
10
7
S
9
8
DG509A (PDIP, SOIC)
TOP VIEW
A
1
0
2
EN
V-
3
S
4
1A
S
5
2A
S
6
3A
S
7
4A
D
8
A
A
16
1
GND
15
V+
14
S
13
1B
S
12
2B
S
11
3B
S
10
4B
D
9
B
Truth Tables
DG506A, DG507A, DG508A, DG509A
DG506A
A
3
A
2
A
1
A
EN ON SWITCH
0
XXXX0 None
00001 1
00011 2
00101 3
00111 4
01001 5
01011 6
01101 7
01111 8
10001 9
10011 1 0
10101 1 1
10111 1 2
11001 1 3
11011 1 4
11101 1 5
11111 1 6
Logic “0” = VAL,V
≤ 0.8V, Logic “1” = VAH,V
ENL
ENH
≥ 2.4V.
DG508A
A
2
A
1
A
0
EN ON SWITCH
X X X 0 None
0001 1
0011 2
0101 3
0111 4
1001 5
1011 6
1101 7
1111 8
A0, A1, A2, EN
Logic “1” = VAH≥ 2.4V, Logic “0” = VAL≤ 0.8V
DG507A
A
2
A
1
A
0
EN ON SWITCH
X X X 0 None
0001 1
0011 2
0101 3
0111 4
1001 5
1011 6
1101 7
1111 8
Logic “0” = VAL, V
≤ 0.8V, Logic “1” = VAH, V
ENL
ENH
≥ 2.4V.
DG509A
A
1
A
0
EN ON SWITCH
X X 0 None
0 0 1 1A, 1B
0 1 1 2A, 2B
1 0 1 3A, 3B
1 1 1 4A, 4B
A0, A1, EN
Logic “1” = VAH≥ 2.4V, Logic “0” = VAL≤ 0.8V.
2
Functional Diagrams
DG506A
S
1
S
2
S
3
S
4
S
5
S
6
S
7
S
8
S
9
S
10
S
11
S
12
S
13
S
14
S
15
S
16
D
ADDRESS DECODER
A
0
DG506A, DG507A, DG508A, DG509A
1 OF 16
A1A2A
3
ENABLE
1 OF 4
EN
DG507A
S
1A
S
2A
S
3A
S
4A
S
5A
S
6A
S
7A
S
8A
S
1B
S
2B
S
3B
S
4B
S
5B
S
6B
S
7B
S
8B
D
A
D
B
ADDRESS DECODER
1 OF 8
A
A1A2EN (ENABLE INPUT)
0
ENABLE
1 OF 2
4 Line Binary Address Inputs
(0 0 0 1) and EN = 5V
Above example shows channel 2 turned ON.
DG508A
S
1
S
2
S
3
S
4
S
5
S
6
S
7
S
8
D
ADDRESS DECODER
1 OF 8
A
A1A2EN (ENABLE INPUT)
0
3 Line Binary Address Inputs
(1 0 1) and EN = 1
Above example shows channel 6 turned ON.
Schematic Diagram
V+
LOGIC TRIP
POINT REF
3 Line Binary Address Inputs
(0 0 0) and EN = 5V
Above example shows channels 1A and 1B turned ON.
DG509A
S
1A
S
2A
S
3A
S
4A
S
1B
S
2B
S
3B
S
4B
D
A
D
B
2 Line Binary Address Inputs
(0 0) and EN = 1
Above example shows channels 1A and 1B turned ON.
S
+
-
DECODER
A
X
V+
X
GND
LOGIC A
INPUT OR EN
X
V-
LOGIC INTERFACE
AND LEVEL SHIFTER
3
TYPICAL
SWITCH
D
X
DG506A, DG507A, DG508A, DG509A
Absolute Maximum Ratings Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
Digital Inputs, VS, VD (Note 1). . . . . . . . . . . . . .(V- -2V) To (V+ +2V)
Continuous Current, (Any Terminal Except S or D). . . . . . . . . 30mA
Continuous Current, (S or D). . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 40mA
Operating Conditions
Temperature Range
“A” Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
“B” Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC
“C” Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Signals on SX, DX, EN, or AXexceeding V+ or V- are clamped by internal diodes. Limit diode current to maximum current ratings.
2. θ JA is measured with the component mounted on an evaluation PC board in free air.
Thermal Resistance (Typical, Note 2) θ JA (oC/W) θ JC (oC/W)
16 Ld CERDIP Package. . . . . . . . . . . . 75 20
28 Ld CERDIP Package. . . . . . . . . . . . 55 18
16 Ld PDIP Package . . . . . . . . . . . . . . 90 N/A
28 Ld PDIP Package . . . . . . . . . . . . . . 55 N/A
16 Ld SOIC Package . . . . . . . . . . . . . . 100 N/A
28 Ld SOIC Package . . . . . . . . . . . . . . 70 N/A
Maximum Junction Temperature
CERDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175oC
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature
“A” and “B” Suffix . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to 150oC
“C” Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to 125oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
Electrical Specifications T
= 25oC, V+ = +15V, V- = -15V, GND = 0V, VEN = 2.4V, Unless Otherwise Specified
A
“A” SUFFIX “B” AND “C” SUFFIX
(NOTE4)
PARAMETER TEST CONDITIONS
MIN
(NOTE3)
TYP
(NOTE4)
MAX
(NOTE4)
MIN
(NOTE3)
TYP
(NOTE4)
MAX
DYNAMIC CHARACTERISTICS
Switching Time of
Multiplexer, t
TRANSITION
Break-Before-Make
Interval, t
OPEN
Enable Turn-ON Time,
t
ON(EN)
Enable Turn-OFF Time,
t
OFF(EN)
OFF Isolation, OIRR V
Source OFF Capacitance,
C
S(OFF)
See Figure 1 - 0.6 1 - 0.6 - µ s
See Figure 3 - 0.2 - - 0.2 - µ s
See Figure 2 - 1 1.5 - 1 - µ s
See Figure 2 - 0.4 1.0 - 0.4 - µ s
= 0V, RL = 1kΩ , CL = 15pF,
EN
VS = 7V
, f = 500kHz (Note 5)
RMS
-6 8- -6 8-d B
VS = 0V, VEN = 0V, f = 140kHz
DG506A, DG507A - 6 - - 6 - pF
DG508A, DG509A - 5 - - 5 - pF
Drain OFF Capacitance,
C
D(OFF)
VD = 0V, VEN = 0V, f = 140kHz
DG506A - 45 - - 45 - pF
DG507A - 23 - - 23 - pF
DG508A - 25 - - 25 - pF
DG509A - 12 - - 12 - pF
Charge Injection, Q See Figure 4
DG506A, DG507A - 6 - - 6 - pC
DG508A, DG509A - 4 - - 4 - pC
DIGITAL INPUT CHARACTERISTICS
Address Input Current,
Input Voltage High, I
Address Input Current
Input Voltage Low, I
AL
VA = 2.4V -10 -0.002 - -10 -0.002 - µ A
AH
= 15V - 0.006 10 - 0.006 10 µ A
V
A
VEN = 2.4V VA = 0V -10 -0.002 - -10 -0.002 - µ A
= 0V -10 -0.002 - -10 -0.0002 - µ A
V
EN
UNITS
4
DG506A, DG507A, DG508A, DG509A
Electrical Specifications T
= 25oC, V+ = +15V, V- = -15V, GND = 0V, VEN = 2.4V, Unless Otherwise Specified (Continued)
A
“A” SUFFIX “B” AND “C” SUFFIX
(NOTE4)
PARAMETER TEST CONDITIONS
MIN
(NOTE3)
TYP
(NOTE4)
MAX
(NOTE4)
MIN
(NOTE3)
TYP
(NOTE4)
MAX
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range,
V
ANALOG
Drain-Source ON
Resistance, r
DS(ON)
(Note 7) -15 - +15 -15 - +15 V
SequenceEach
Switch ON
VAL = 0.8V
IS = -200µ A, VD = +10V - 270 400 - 270 450 Ω
= -200µ A, VD = -10V - 230 400 - 230 450 Ω
I
S
VAH = 2.4V
r
Matching
DS(ON)
Between Channels
Source OFF Leakage
Current, I
S(OFF)
Drain OFF Leakage
Current, I
D(OFF)
-10V ≤ VS≤ +10V - 6 - - 6 - %
∆ r
DS ON ()
r
DS(ON)MAXrDS ON () MIN
----------------------------------------------------------------------- - =
–
r
DS ON () AVG
VEN = 0V VS = +10V, VD = -10V -1 0.002 1 -5 0.002 5 nA
= -10V, VD = +10V -1 -0.005 1 -5 -0.005 5 nA
V
S
VEN = 0V
DG506A VS = -10V, VD = +10V -10 0.02 10 -20 0.02 20 nA
= +10V, VD = -10V -10 -0.03 10 -20 -0.03 20 nA
V
S
DG507A V
DG508A V
DG509A V
Drain ON LeakageCurrent,
I
D(ON)
DG506A VD = V
(Note 6)
SequenceEach
Switch ON
VAL = 0.8V
VAH = 2.4V
DG507A V
DG508A V
DG509A V
= -10V, VD = +10V -5 0.007 5 -10 0.007 10 nA
S
= +10V, VD = -10V -5 -0.015 5 -10 -0.015 10 nA
V
S
= -10V, VD = +10V - 0.01 10 - 0.01 20 nA
S
V
= +10V, VD = -10V -10 -0.015 - -20 -0.015 - nA
S
= -10V, VD = +10V - 0.005 10 - 0.005 20 nA
S
= +10V, VD = -10V -10 -0.008 - -20 -0.008 - nA
V
S
= +10V -10 0.03 10 -20 0.03 20 nA
S(ALL)
= V
V
D
= V
D
V
= V
D
= V
D
= V
V
D
= V
D
= V
V
D
= -10V -10 -0.06 10 -20 -0.06 20 nA
S(ALL)
= +10V -5 0.015 5 -10 0.015 10 nA
S(ALL)
= -10V -5 -0.03 5 -10 -0.03 10 nA
S(ALL)
= +10V - 0.015 10 - 0.015 20 nA
S(ALL)
= -10V -10 -0.03 - -20 -0.03 - nA
S(ALL)
= +10V - 0.007 10 - 0.007 20 nA
S(ALL)
= -10V -10 -0.015 - -20 -0.015 - nA
S(ALL)
POWER SUPPLY CHARACTERISTICS
Positive Supply Current,I+V
= 5.0V, VA = 0V
EN
- 1.3 2.4 - 1.3 2.4 mA
(Enabled)
Negative Supply Current,
-1.5 -0.7 - -1.5 -0.7 - mA
IPositive Supply Current,
I+ Standby
Negative Supply Current,
= 0V, VA = 0V
V
EN
(Standby)
- 1.3 2.4 - 1.3 2.4 mA
-1.5 -0.7 - -1.5 -0.7 - mA
I- Standby
UNITS
5
DG506A, DG507A, DG508A, DG509A
Electrical Specifications T
= Over Operating Temperature Range, V+ = +15V, V- = -15V, GND = 0V, VEN = 2.4V,
A
Unless Otherwise Specified
“A” SUFFIX “B” AND “C” SUFFIX
PARAMETER TEST CONDITIONS
(NOTE 3)
TYP MAX MIN
(NOTE 3)
TYP MAX
UNITS MIN
DIGITAL INPUT CHARACTERISTICS
Address Input Current, Input
Voltage High, I
AH
Address Input Current Input
Voltage Low, I
AL
VA = 2.4V -30 - - - - - µ A
VA = 15V - - 30 - - - µ A
VEN = 2.4V VA = 0V -30 - - - - - µ A
VEN = 0V -30 - - - - - µ A
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range,
V
ANALOG
Drain-Source ON
Resistance, r
DS(ON)
(Note 7) -15 - +15 - - - V
Sequence Each
Switch ON
VAL = 0.8V
IS = -200µ A, VD = +10V - - 500 - - - Ω
IS = -200µ A, VD = -10V - - 500 - - - Ω
VAH = 2.4V
Source OFF Leakage
Current, I
S(OFF)
Drain OFF Leakage Current,
I
D(OFF)
VEN = 0V VS = +10V, VD = -10V - - 50 - - - nA
VS = -10V, VD = +10V -50 - - - - - nA
VEN = 0V
DG506A VS = -10V, VD = +10V - - 300 - - - nA
VS = +10V, VD = -10V -300 - - - - - nA
DG507A VS = -10V, VD = +10V - - 200 - - - nA
VS = +10V, VD = -10V -200 - - - - - nA
DG508A VS = -10V, VD = +10V - - 200 - - - nA
VS = +10V, VD = -10V -200 - - - - - nA
DG509A VS = -10V, VD = +10V - - 100 - - - nA
VS = +10V, VD = -10V -100 - - - - - nA
Drain ON Leakage Current,
I
D(ON)
DG506A VD = V
DG507A VD = V
DG508A VD = V
DG509A VD = V
(Note 6)
Sequence Each
Switch ON
VAL = 0.8V
VAH = 2.4V
VD = V
VD = V
VD = V
VD = V
= +10V - - 300 - - - nA
S(ALL)
= -10V -300 - - - - - nA
S(ALL)
= +10V - - 200 - - - nA
S(ALL)
= -10V -200 - - - - - nA
S(ALL)
= +10V - - 200 - - - nA
S(ALL)
= -10V -200 - - - - - nA
S(ALL)
= +10V - - 100 - - - nA
S(ALL)
= -10V -100 - - - - - nA
S(ALL)
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+ VEN = 5.0V, VA = 0V -3.2 - 4.5 - - - mA
Negative Supply Current, I- -3.2 - 4.5 - - - mA
Positive Standby Supply Current, I+ VEN = 0V, VA = 0V -3.2 - 4.5 - - - mA
Negative Standby Supply Current, I- -3.2 - 4.5 - - - mA
NOTES:
3. Typical values are for design aid only, not guaranteed and not subject to production testing.
4. The algebraic convention whereby the most negative value is a minimum, and the most positive value is a maximum, is used in this data sheet.
5. Off isolation = 20Log |VS|/|VD|, where VS = input to Off switch, and VD = output due to VS.
6. I
is leakage from driver into “ON” switch.
D(ON)
7. Parameter not tested. Parameter guaranteed by design or characterization.
6