intersil DG411, DG412, DG413 Data Sheet

®

DG411, DG412, DG413

Data Sheet June 20, 2007

Monolithic Quad SPST, CMOS Analog
Switches

The DG411 series monolithic CMOS analog switches are
drop-in replacements for the popular DG211 and DG212
series devices. They include four independent single pole
throw (SPST) analog switches, and TTL and CMOS
compatible digital inputs.

These switches feature lower analog ON-resistance (<35Ω)
and faster switch time (t
or DG212. Charge injection has been reduced, simplifying
sample and hold applications.

The improvements in the DG411 series are made possible
by using a high voltage silicon-gate process. An epitaxial
layer prevents the latch-up associated with older CMOS
technologies. The 44V maximum voltage range permits
controlling 40V
single-ended from +5V to 44V, or split from ±5V to ±20V.

The four switches are bilateral, equally matched for AC or
bidirectional signals. The ON-resistance variation with analog
signals is quite low over a ±15V analog input range. The
switches in the DG41 1 an d DG412 are identical, dif fering only
in the polarity of the selection logic. T wo of the switches in the
DG413 (#2 and #3) use the logic of the DG211 and DG411
(i.e., a logic “0” turns the switch ON) and the other two
switches use DG212 and DG412 positive logic. This permits
independent control of turn-on and turn-off times for SPDT
configurations, permitting “break-before-make” or “make­before-break” operation with a minimum of external logic.

signals. Power supplies may be

P-P

<175ns) compared to the DG211

ON

FN3282.13

Features

• ON-Resistance (Max). . . . . . . . . . . . . . . . . . . . . . . . . 35Ω

• Low Power Consumption (P

• Fast Switching Action

(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175ns

-t

ON

-t

(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145ns

OFF

• Low Charge Injection

• Upgrade from DG211, DG212

• TTL, CMOS Compatible

• Single or Split Supply Operation

• Pb-Free Plus Anneal Available (RoHS Compliant)

). . . . . . . . . . . . . . . . . . <35µW

D

Applications

• Audio Switching

• Battery Operated Systems

• Data Acquisition

• Hi-Rel Systems

• Sample and Hold Circuits

• Communication Systems

• Automatic Test Equipment

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

Copyright Intersil Americas Inc. 1993, 1994, 1997, 1999, 2002, 2004-2007. All Rights Reserved

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

DG411, DG412, DG413

Ordering Information

PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. #

DG411DJ DG411DJ -40 to +85 16 Ld PDIP E16.3
DG411DJZ (Note) DG411DJZ -40 to +85 16 Ld PDIP** (Pb-free) E16.3
DG411DY* DG411DY -40 to +85 16 Ld SOIC (150 mil) M16.15
DG411DYZ* (Note) DG411DYZ -40 to +85 16 Ld SOIC (150 mil) (Pb-free) M16.15
DG411DVZ* (Note) DG411 DVZ -40 to +85 16 Ld TSSOP (4.4mm) (Pb-free) M16.173
DG412DJ DG412DJ -40 to +85 16 Ld PDIP E16.3
DG412DJZ (Note) DG412DJZ -40 to +85 16 Ld PDIP** (Pb-free) E16.3
DG412DY* DG412DY -40 to +85 16 Ld SOIC (150 mil) M16.15
DG412DYZ* (Note) DG412DYZ -40 to +85 16 Ld SOIC (150 mil) (Pb-free) M16.15
DG412DVZ* (Note) DG412 DVZ -40 to +85 16 Ld TSSOP (4.4mm) (Pb-free) M16.173
DG413DJ DG413DJ -40 to +85 16 Ld PDIP E16.3
DG413DJZ (Note) DG413DJZ -40 to +85 16 Ld PDIP** (Pb-free) E16.3
DG413DY* DG413DY -40 to +85 16 Ld SOIC (150 mil) M16.15
DG413DYZ* (Note) DG413DYZ -40 to +85 16 Ld SOIC (150 mil) (Pb-free) M16.15
DG413DVZ* (Note) DG413 DVZ -40 to +85 16 Ld TSSOP (4.4mm) (Pb-free) M16.173
*Add “-T” suffix for tape and reel.

**Pb-free PDIPs can be used for through ho le wave so ld er p r ocessin g only. They are not intended for use in Re flow solder proce ssing
applications.

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak re flo w t em per atur e s th at me et or e xcee d the Pb -f re e re qu ire me nts of IP C/ JE DEC J ST D-02 0.

TRUTH TABLE

DG411 DG412 DG413

LOGIC

SWITCH SWITCH

SWITCH

1, 4

SWITCH

2, 3

0OnOff Off On
1 Off On On Off

NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V.

Pinout

DG411, DG412, DG413

(16 LD PDIP, SOIC, TSSOP)

TOP VIEW

16

IN

D
S

GND

S
D

IN

1

1

2

1

3

1

4

V-

5
6

4

7

4

8

4

IN

2

15

D

2

14

S

2

13

V+
V

12

L

11

S

3

10

D

3

9

IN

3

Pin Descriptions

PIN SYMBOL DESCRIPTION

1IN
2D
3S
4 V- Negative Power Supply Terminal.
5 GND Ground Terminal (Logic Common).
6S
7D
8IN

9IN
10 D
11 S
12 V
13 V+ Positive Power Supply Terminal (Substrate).
14 S
15 D
16 IN

Logic Control for Switch 1.

1

Drain (Output) Terminal for Switch 1.

1

Source (Input) Terminal for Switch 1.

1

Source (Input) Terminal for Switch 4.

4

Drain (Output) Terminal for Switch 4.

4

Logic Control for Switch 4.

4

Logic Control for Switch 3.

3

Drain (Output) Terminal for Switch 3.

3

Source (Input) Terminal for Switch 3.

3

Logic Reference Voltage.

L

Source (Input) Terminal for Switch 2.

2

Drain (Output) Terminal for Switch 2.

2

Logic Control for Switch 2.

2

2

FN3282.13

June 20, 2007

DG411, DG412, DG413

Functional Diagrams Four SPST Switches per Package Switches Shown for Logic “1” Input

DG411

S

1

IN

1

IN

2

IN

3

IN

4

IN

1

D

1

S

2

IN

2

D

2

S

3

IN

3

D

3

S

4

IN

4

D

4

DG412

DG413

S

1

IN

1

D

1

S

2

IN

2

D

2

S

3

IN

3

D

3

S

4

IN

4

D

4

Schematic Diagram (1 Channel)

V+

S

1

D

1

S

2

D

2

S

3

D

3

S

4

D

4

IN

GND

S

V-

V

L

V+

X

D

V-

3

FN3282.13

June 20, 2007

DG411, DG412, DG413

Absolute Maximum Ratings Thermal Information

V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V

GND to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V

V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) to (V+) +0.3V

L

Digital Inputs, V

, VD (Note 1). . . . . (V-) -2V to (V+) + 2V or 30mA,

S

Whichever Occurs First

Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA

Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . 100mA

Operating Conditions

Voltage Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V (Max)

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V (Max)

Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V (Min)

Input Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤20ns

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.

NOTES:

1. Signals on S
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

2. θ

JA

, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.

X

Thermal Resistance (Typical, Note 2) θ

(°C/W)

JA

PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 150

Maximum Junction Temperature (Plastic Packages). . . . . . .+150°C

Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

(SOIC and TSSOP - Lead Tips Only)
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.

Electrical Specifications Test Conditions: V+ = +15V, V- = -15V, V

Unless Otherwise Specified.

PARAMETER TEST CONDITI ONS

= 5V, VIN = 2.4V, 0.8V (Note 3),

L

TEMP

(°C)

(Note 4)

MIN

TYP

(Note 5)

MAX

(Note 4) UNITS

DYNAMIC CHARACTERISTICS

Turn-ON Time, t

ON

RL = 300Ω, CL = 35pF, VS = ±10V (Figure 1) 25 - 110 175 ns

85 - - 220 ns

Turn-OFF Time, t

OFF

25 - 100 145 ns

85 - - 160 ns
Break-Before-Make Time Delay DG413 Only, R
Charge Injection, Q (Figure 3) C

= 10nF, VG = 0V, RG = 0Ω 25 - 5 - pC

L

= 300Ω, CL = 35pF (Figure 2) 25 - 25 - ns

L

OFF Isolation (Figure 5) RL = 50Ω, CL = 5pF, f = 1MHz 25 - 68 - dB
Crosstalk (Channel-to-Channel),

25 - -85 - dB
(Figure 4)

Source OFF Capacitance, C
Drain OFF Capacitance, C
Channel ON Capacitance,

C

+ C

D(ON)

S(ON)

S(OFF)

D(OFF)

f = 1MHz (Figure 6) 25 - 9 - pF

25 - 9 - pF

25 - 35 - pF

DIGITAL INPUT CHARACTERISTICS

Input Current V
Input Current V

Low, I

IN

High, I

IN

IL

IH

VIN Under Test = 0.8V, All Others = 2.4V Full -0.5 0.005 0.5 μA
VIN Under Test = 2.4V, All Others = 0.8V Full -0.5 0.005 0.5 μA

ANALOG SWITCH CHARACTERISTICS

Analog Signal Range, V

ANALOG

Drain-Source ON Resistance,
r

DS(ON)

±

IS = 10mA Full -15 - 15 V

±

IS = 10mA, VD = ±8.5V, V+ = 13.5V, V- = -13.5V 25 - 25 35 Ω

Full - - 45 Ω

4

FN3282.13

June 20, 2007