Intersil Corporation DG406 Datasheet
DG406, DG407
Data Sheet June 1999
Single 16-Channel/Differential 8-Channel,
CMOS Analog Multiplexers
The DG406 and DG407 monolithic CMOS analog
multiplexers are drop-in replacements for the popular
DG506A and DG507A series devices. Theyeachincludean
array of sixteen analog switches, a TTL and CMOS
compatible digital decode circuit for channel selection, a
voltage referencefor logic thresholds, and an ENABLEinput
for device selection when several multiplexers are present.
These multiplexers feature lower signal ON resistance
(<100Ω) and faster transition time (t
compared to the DG506A and DG507A. Charge injection
has been reduced, simplifying sample and hold applications.
The improvements in the DG406 series are made possible
by using a high voltage silicon-gate process. An epitaxial
layer prevents the latch-up associated with older CMOS
technologies. The 44V maximum voltage range permits
controlling 30V
supplies.
signals when operating with ±15V power
P-P
TRANS
< 300ns)
File Number
3116.5
Features
• ON-Resistance (Max). . . . . . . . . . . . . . . . . . . . . . . . 100Ω
• Low Power Consumption (P
• Fast Transition Time (Max). . . . . . . . . . . . . . . . . . . .300ns
• Low Charge Injection
• TTL, CMOS Compatible
• Single or Split Supply Operation
) . . . . . . . . . . . . . . <1.2mW
D
Applications
• Battery Operated Systems
• Data Acquisition
• Medical Instrumentation
• Hi-Rel Systems
• Communication Systems
• Automatic Test Equipment
The sixteenswitches are bilateral,equally matched for AC or
bidirectional signals. The ON resistance variation with
analog signals is quite low over a ±5V analog input range.
Ordering Information
PART
NUMBER
DG406DJ -40 to 85 28 Ld PDIP E28.6
DG406DY -40 to 85 28 Ld SOIC M28.3
DG407DJ -40 to 85 28 Ld PDIP E28.6
DG407DY -40 to 85 28 Ld SOIC M28.3
DG407DN -40 to 85 28 Ld PLCC N28.45
TEMP.
RANGE (oC) PACKAGE PKG. NO.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
Pinouts
DG406 (PDIP, SOIC)
TOP VIEW
V+
1
2
NC
3
NC
4
S
16
S
5
15
S
6
14
S
7
13
S
8
12
S
9
11
S
10
10
S
11
9
GND
12
NC
13
A
14
3
DG406, DG407
DG407 (PDIP, SOIC)
TOP VIEW
28
D
V-
27
26
S
8
S
25
7
S
24
6
S
23
5
S
22
4
S
21
3
20
S
2
S
19
1
EN
18
17
A
0
16
A
1
A
15
2
V+
D
NC
S
8B
S
7B
S
6B
S
5B
S
4B
S
3B
S
2B
S
1B
GND
NC
NC
1
2
B
3
4
5
6
7
8
9
10
11
12
13
14
DG407 (PLCC)
TOP VIEW
28
D
A
V-
27
S
26
8A
S
25
7A
S
24
6A
S
23
5A
S
22
4A
S
21
3A
20
S
2A
S
19
1A
EN
18
17
A
0
16
A
1
A
15
2
SUPPLY
B
S8BNC
+V
D
1234
5
S
7B
6
S
6B
7
S
5B
8
S
4B
9
S
3B
10
S
2B
11
S
1B
DA-V
SUPPLY
8A
S
262728
S
25
7A
S
24
6A
S
23
5A
S
22
4A
S
21
3A
S
20
2A
S
19
1A
12 13 14 15 16 17 18
2A1A0
A
NC
NC
GND
ENABLE
2
DG406, DG407
Schematic Diagram
V+
GND
A
A
0
X
V
REF
V+
EN
V-
Functional Diagrams
DG406 DG407
S
1
S
2
S
3
S
4
S
5
S
6
S
7
S
8
S
9
S
10
S
11
S
12
S
13
S
14
S
15
S
16
TO DECODER LOGIC
CONTROLLING BOTH
TIERS OF MUXING
ADDRESS DECODER
1 OF 16
(Typical Channel)
D
ENABLE
LEVEL
SHIFT
DECODE/
DRIVE
S
1A
S
2A
S
3A
S
4A
S
5A
S
6A
S
7A
S
8A
S
1B
S
2B
S
3B
S
4B
S
5B
S
6B
S
7B
S
8B
TO DECODER LOGIC
CONTROLLING BOTH
TIERS OF MUXING
ADDRESS DECODER
1 OF 8
V+
D
A
D
B
V-
ENABLE
D
S
1
S
N
A0A1A2A
3
3
EN
A0A1A
2
EN
DG406, DG407
DG406 TRUTH TABLE
A
A
3
A
2
A
1
EN ON SWITCH
0
XXXX0 None
00001 1
00011 2
00101 3
00111 4
01001 5
01011 6
01101 7
01111 8
10001 9
10011 10
10101 11
10111 12
11001 13
11011 14
11101 15
11111 16
DG407 TRUTH TABLE
A
2
A
1
A
0
EN ON SWITCH PAIR
X X X 0 None
0001 1
0011 2
0101 3
0111 4
1001 5
1011 6
1101 7
1111 8
Logic “0” = VAL < 0.8V.
Logic “1” = VAH > 2.4V.
X = Don’t Care.
4
DG406, DG407
Absolute Maximum Ratings Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44.0V
GND to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
Digital Inputs, VS, VD (Note 1). . . . . . (V-) -2V to (V+) +2V or 20mA,
Whichever Occurs First
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . .100mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Signals on SX, DX, EN or AX exceeding V+ or V- are clamped by internal diodes. Limit diode current to maximum current ratings.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Thermal Resistance (Typical, Note 2) θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(PLCC and SOIC - Lead Tips Only)
Electrical Specifications Test Conditions: V+ = +15V , V- = -15V, V
PARAMETER TEST CONDITIONS TEMP (oC)
= 0.8V, VAH = 2.4V Unless Otherwise Specified
AL
(NOTE 3)
MIN
(NOTE 4)
TYP
(NOTE 3)
MAX UNITS
DYNAMIC CHARACTERISTICS
Transition Time, t
TRANS
(See Figure 1) 25 - 200 300 ns
Full - - 400 ns
Break-Before-Make Interval, t
OPEN
(See Figure 3) 25 25 50 - ns
Full 10 - - ns
Enable Turn-ON Time, t
ON(EN)
(See Figure 2) 25 - 150 200 ns
Full - - 400 ns
Enable Turn-OFF Time, t
OFF(EN)
25 - 70 150 ns
Full - - 300 ns
Charge Injection, Q C
OFF Isolation, OIRR V
= 1nF, VS = 0V, RS = 0Ω 25-40-pC
L
= 0V, RL = 1kΩ,
EN
25 - -69 - dB
f = 100kHz (Note 7)
Logic Input Capacitance, C
Source OFF Capacitance, C
IN
S(OFF)
f = 1MHz 25 - 7 - pF
VEN = 0V, VS = 0V,
25 - 8 - pF
f = 1MHz
Drain OFF Capacitance, C
D(OFF)
DG406 25 - 160 - pF
VEN = 0V, VD = 0V,
f = 1MHz
DG407 25-80-pF
Drain ON Capacitance, C
D(ON)
DG406 25 - 180 - pF
VEN = 5V, VD = 0V,
f = 1MHz
DG407 25-90-pF
DIGITAL INPUT CHARACTERISTICS
Logic High Input Voltage, V
Logic Low Input Voltage, V
Logic High Input Current, I
Logic Low Input Current, I
AL
INL
AH
INH
VA = 2.4V, 15V Full -1 - 1 µA
VEN = 0V, 2.4V, VA = 0V Full -1 - 1 µA
Full 2.4 - - V
Full - - 0.8 V
5
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