Intersil Corporation DG308A Datasheet

DG308A

Data Sheet November 1999

Quad Monolithic SPST, CMOS Analog
Switch

The DG308A quad monolithic SPST, CMOS switch is latch
proof and is designed to block signals up to 30V

P-P

when
OFF. Featuring low ON resistance, low power consumption,
and rail-to-rail analog signal range, this switch is ideally
suited for high speed switching applications in
communications, instrumentation and process control. The
DG308A has single and dual supply capability. The input
thresholds are CMOS compatible.

Ordering Information

TEMP.

PART NUMBER

RANGE (oC) PACKAGE

DG308ACJ 0 to 70 16 Ld PDIP E16.3
DG308ACY 0 to 70 16 Ld SOIC M16.15

PKG.

NO.

Pinout

DG308A

(PDIP, SOIC)

TOP VIEW

IN

D
S

GND

S
D

IN

1

1

2

1

3

1

4

V-

4

4
4

-

5
6
7
8

16
15
14
13
12
11
10

9

IN

2

D

2

S

2

V+ (SUB­STRATE)

NC
S

3

D

3

IN

3

File Number 3120.3

Features

• Low Power Consumption

• CMOS Compatible

• ±15V Analog Signal Range

• Single or Dual Supply Capability

• Alternate Source

Functional Diagram

DG308A

IN

1

IN

2

IN

3

IN

4

SWITCHES SHOWN FOR LOGIC “1” INPUT

TRUTH TABLE

LOGIC DG308A

0 OFF
1ON

Logic “0” ≤3.5V, Logic “1” ≥ 11V at V+ = 15V.

S

1

D

1

S

2

D

2

S

3

D

3

S

4

D

4

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Copyright © Intersil Corporation 1999

Schematic Diagram (One Channel)

V+

DG308A

DG308A

V

IN

GND

V-

P

1

N

1

P

2

N

2

P

3

P

4

P

N

3

P

5

6

N

6

P

7

P

8

N

7

N

9

N

11

S

N

8

D

N

N

4

N

5

10

2

DG308A

Absolute Maximum Ratings Thermal Information

V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V

V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V

Digital Inputs, VS, VD (Note 1). . . . . . . . . . . . . . (V-) -2V to (V+) +2V

or 30mA, Whichever Comes First

Continuous Current, (Any Terminal Except S). . . . . . . . . . . . . 30mA

Continuous Current, (S or D). . . . . . . . . . . . . . . . . . . . . . . . . . 20mA

Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 70mA

Operating Conditions

Temperature Range

“C” Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.

2. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications V+ = 15V, V- = -15V, GND = 0V, TA = 25oC

PARAMETER TEST CONDITIONS

DYNAMIC CHARACTERISTICS

Turn-ON Time, t
Turn-OFF Time, t

ON

OFF

Charge Injection, Q CL = 1µF, RS = 0, VS = 0V - -10 - pC
OFF Isolation, OIRR VIN = 0V, RL = 75Ω, VS = 2V

Source OFF Capacitance, C

Drain OFF Capacitance, C

S(OFF)

D(OFF)

Channel ON Capacitance,
C

+ C

D(ON)

S(ON)

DIGITAL INPUT CHARACTERISTICS

Input Current with Voltage High, I
Input Current with Voltage Low, I

ANALOG SWITCH CHARACTERISTICS

Analog Signal Range, V
Drain-Source ON Resistance, r

Source OFF Leakage Current, I

Drain OFF Leakage Current, I

Channel ON Leakage Current, I

ANALOG

DS(ON)VIN

S(OFF)VIN

D(OFF)

D(ON)VIN

See Figure 1 - 130 200 ns
See Figure 1 - 90 150 ns

(Note 5)
f = 140kHz VS = 0V

VIN = 0V
VD = 0V

VIN = 0V
VS = VD = 0V

VIN = 15V

VIN = 15V, Full Temperature Range - 0.001 1 µA

IH

VIN = 0V, Full Temperature Range -1 -0.001 - µA

IL

= 11V IS = -1mA, VD = +10V - 60 100 Ω

IS = 1mA, VD = -10V - 60 100 Ω

= 3.5V VS = 14V, VD = -14V - 0.1 5 nA

VS = -14V, VD = 14V -5 -0.1 - nA
VS = -14V, VD = 14V - 0.1 5 nA
VS = 14V, VD = -14V -5 -0.1 - nA

= 11V VD = VS = 14V - 0.1 5 nA

VD = VS = -14V -5 -0.1 - nA

Thermal Resistance (Typical, Note 2) θJA (oC/W)

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC

Maximum Storage Temperature Range. . . . . . . . . . . 65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

, f = 500kHz

P-P

(NOTE 4)

MIN

-78-dB

(NOTE 3)

TYP

(NOTE 4)

MAX UNITS

-11-pF

-8-pF

-27-pF

-15 - 15 V

3