Intersil Corporation DG201 Datasheet

DG201

Data Sheet January 2000

CMOS Quad SPST Analog Switch

The DG201 solid state analog switch is designed using an
improved, high voltage CMOS monolithic technology. It
provides ease-of-use and performance advantages not
previously available from solid state switches. Destructive
latch-up of solid state analog gates have been eliminated by
Intersil’s CMOS technology.

The DG201 is completely specification and pinout
compatible with the industry standard devices.

Ordering Information

TEMP. RANGE

PART NUMBER

(oC) PACKAGE

DG201CJ 0 to 70 16 Ld PDIP E16.3

PKG.

NO.

Functional Diagram

S

IN

N

DG201 SWITCH CELL

TRUTH TABLE

LOGIC DG201

0ON
1 OFF

P

D

File Number 3115.4

Features

• Switches Greater than 28V

• Break-Before-Make Switching

-t

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250ns

OFF

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .700ns

-t

ON

• TTL, DTL, CMOS, PMOS Compatible

• Non-Latching with Supply Turn-Off

• Complete Monolithic Construction

• Industry Standard (DG201)

Signals with ±15V Supplies

P-P

Applications

• Data Acquisition

• Sample and Hold Circuits

• Operational Amplifier Gain Switching Networks

Pinout

DG201 (PDIP)

TOP VIEW

16

1

IN

1

2

D

1

3

S

1

4

V-

5

GND

6

S

4

7

D

4

8

IN

4

SWITCHES SHOWN FOR LOGIC “1” INPUT

IN

2

15

D

2

14

S

2

13

V+(SUBSTRATE)

12

V

REF

11

S

3

10

D

3

9

IN

3

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Copyright © Intersil Corporation 2000

DG201

Functional Diagram (

Q

3

V

Q

1

PROTECTION

RESISTOR

REF

GATE

1

/4 DG201)

V+

V-

Q

7

Q

5

Q

Q

8

Q

10

Q

2

Q

4

Q

6

Q

9

15

V+

Q

12

S

1

Q

11

Q

14

Q

13

D

1

INPUT

Pin Descriptions

PIN SYMBOL DESCRIPTION

1IN1Logic Control for Switch 1
2D1Drain (Output) Terminal for Switch 1
3S1Source (Input) Terminal for Switch 1
4 V- Negative Power Supply Terminal
5 GND Ground Terminal (Logic Common)
6S4Source (Input) Terminal for Switch 4
7D4Drain (Output) Terminal for Switch 4
8IN4Logic Control for Switch 4

9IN3Logic Control for Switch 3
10 D
11 S
12 V

REF

13 V+ Positive Power Supply Terminal (Substrate)
14 S
15 D
16 IN

Drain (Output) Terminal for Switch 3

3

Source (Input) Terminal for Switch 3

3

Logic Reference Voltage

Source (Input) Terminal for Switch 2

2

Drain (Output) Terminal for Switch 2

2

Logic Control for Switch 2

2

V-

2

DG201

Absolute Maximum Ratings Thermal Information

V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V

V+ to VD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V

VD to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V

VD to VS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28V

V

to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33V

REF

V

to VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V

REF

V

to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V

REF

VIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V

Current (Any Terminal). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA

Operating Conditions

Temperature Range

“C” Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)

PDIP Package . . . . . . . . . . . . . . . . . . . 90 N/A

Maximum Junction Temperature

Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150oC

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC

Electrical Specifications T

= 25oC, V+ = +15V, V- = -15V

A

“C” SUFFIX

PARAMETER TEST CONDITIONS

(NOTE 2)

25oC70

o

UNITS0oC

C

DYNAMIC CHARACTERISTICS

Turn-ON Time (Note 3), t
Turn-OFF Time (Note 3), t

ON

OFF

RL=1kΩ,V
RL=1kΩ,V

ANALOG
ANALOG

= -10V to +10V (Figure 1) - 1.0 - µs

= -10V to +10V (Figure 1) - 0.5 - µs
Charge Injection, Q Figure 2 - 20 (Typ) - mV
Off Isolation Rejection Ratio, OIRR f = 1MHz, RL = 100Ω, CL≤ 5pF, (Figure 3) - 50 (Typ) - dB
Crosstalk (Channel-to-Channel), CCRR One Channel Off - -50 (Typ) - dB

DIGITAL INPUT CHARACTERISTICS

Input Logic Current, I
Input Logic Current, I

IN(ON)
N(OFF)

VIN = 0.8V (Note 3) ±1 ±1 ±10 µA
VIN = 2.4V (Note 3) ±1 ±1 ±10 µA

ANALOG SWITCH CHARACTERISTICS

Analog Signal Range, V

ANALOG

Drain-Source ON Resistance, r
Channel-to-Channel

r

Match, r

DS(ON)

DS(ON)

Drain OFF Leakage Current, I
Source OFF Leakage Current, I
Channel ON Leakage

Current, I

D(ON)

+ I

S(ON)

DS(ON)

D(OFF)

S(OFF)

IS = 10mA, V

V

ANALOG

V

ANALOG

= -14V to +14V - ±5 100 nA
= -14V to +14V - ±5 100 nA

= ±10V 100 100 125 Ω

ANALOG

VD = VS = -14V to +14V - ±5 200 nA

- ±15 (Typ) - V

- 30 (Typ) - Ω

POWER SUPPLY CHARACTERISTICS

Supply Current, I+ Positive VIN = 0V or VIN = 5V 2000 1000 2000 µA
Supply Current, I- Negative 2000 1000 2000 µA

NOTES:

2. Typical values are for design aid only, not guaranteed and not subject to production testing.

3. Allchannels are turned offby high “1” logicinputs and all channelsare turned on bylow “0” inputs; however 0.8V to 2.4V describes the minimum
range for switching properly. Peak input current required for transition is typically -120µA.

3