Intersil Corporation CD54ACT623F3A Datasheet

July 1998

SEMICONDUCTOR

CD54ACT623F3A

Octal Bus Transceiver

Three-State, Non-Inverting

Features

• This Circuit is Processed in Accordance to MIL-STD­883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.

• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015

• Meets JEDEC Standard No. 20

• SCR - Latch-Up-Resistant CMOS Process and Circuit
Design

• Speed of Bipolar FAST/A/S with Significantly Reduced
Power Consumption

• Functionally and Pin-Compatible with Industry 54
Bipolar Types in the FAST, AS and S Series

• Balanced Propagation Delays

• Military Operating Temperature Range

- Ceramic (CERDIP) 54 Series: . . . . . . . . -55 to 125

• ±24mA Output Drive Current, Drives 75Ω Lines with­out Need for Terminations

• Fan Out (Over Temperature)

- ACL Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2400

- FAST Loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

- AS Loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

• Operation Voltage . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

o

Description

The CD54ACT623F3A is an octal bus transceiver that uti­lizes Harris Advanced CMOS Logic technology. It is a non­inverting three-state bidirectional transceiver-buffer that
allows for two-way transmission from “A” bus to “B” bus or
“B” bus to “A” bus depending on thelogic levels of the Output
Enable (OE

, OEBA) inputs.

AB

The dual Output Enable provision gives these devices the
capability to store data by simultaneously enabling OE
and OEBA. Each output reinforces its input under these con­ditions, and when all other data sources to the bus lines are
at high-impedance, both sets of bus lines will remain in their
last states.

Ordering Information

TEMP.

PART NUMBER

C

CD54ACT623F3A -55 to 125 20 Ld CERDIP F20.3

NOTE:

1. Wafer and die for this part number is available which meets all elec­trical specifications. Please contact your local sales office or Harris
customer service for ordering information.

RANGE (oC) PACKAGE

Pinout

AB

PKG.

NO.

1

OE

Functional Diagram

A0

A1

A2

A3

A4

A5

A6

A7

OE

AB

OE

BA

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright

© Harris Corporation 1998

2

3

4

5

6

7

8

9

1

19

18

B0

17

B1

16

B2

15

B3

14

B4

13

B5

12

B6

11

B7

1

AB

A0
A1
A2
A3
A4
A5
A6
A7

GND

2
3
4
5
6
7
8
9

10

V

20

CC

OE

19

BA

B0

18

B1

17

B2

16

B3

15

B4

14

B5

13
12

B6
B7

11

File Number 3917.1

CD54ACT623F3A

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V

DC Input Diode Current, I

IK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, I

OK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC Output Source or Sink Current per Output Pin, I

O

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC VCC or Ground Current, I

CC orIGND

(Note 2) . . . . . . . . .±100mA

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, VCC (Note 3). . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

2. For up to 4 outputs per device, add ±25mA for each additional output.

3. Unless otherwise specified, all voltages are referenced to ground.

4. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

TEST

CONDITIONS

PARAMETER SYMBOL

High Level Input Voltage V

Low Level Input Voltage V

High Level Output Voltage V

Low Level Output Voltage V

Input Leakage Current I

Three-State or Leakage

IH

IL

OH

OL

I

I

OZ

Current

Quiescent Device Current I

AdditionalSupply Current per
Input Pin TTL Inputs High

CC

∆I

CC

1 Unit Load

NOTES:

5. Tested 100%.

6. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize
power dissipation.

7. Test verifies a minimum transmission-line-drive capability of 75Ω for 54ACT Series.

(V) IO(mA) MIN MAX MIN MAX

I

- - 4.5 to 5.5 2

- - 4.5 to 5.5 - 0.8

VIH or V

-0.05 4.5 4.4 - 4.4 - V

IL

-24 4.5 3.94

-50

(Note 6, 7)

VIH or V

0.05 4.5 - 0.1 - 0.1 V

IL

24 4.5 - 0.36

50

(Note 6, 7)

VCC or

GND

VIH or V

IL

VO = V

CC

or GND
VCC or

0 5.5 - 8

GND

V

CC

-2.1

Thermal Resistance (Typical, Note 4) θJA (oC/W) θJC (oC/W)

CERDIP Package . . . . . . . . . . . . . . . . 80 22

Maximum Junction Temperature (Hermetic Package or Die) . . . 175oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

CC

o

25

V

CC

(V)

(Note 5)

(Note 5)

C -55oC TO 125oC

-2

-V

(Note 5)

- 0.8

(Note 5)

- 3.7

(Note 5)

-V

(Note 5)

UNITSV

V

5.5 - - 3.85 - V

(Note 5)

- 0.5
(Note 5)

V

5.5 - - - 1.65 V

- 5.5 - ±0.1
(Note 5)

- 5.5 - ±0.5
(Note 5)

(Note 5)

- ±1
(Note 5)

- ±10
(Note 5)

- 160
(Note 5)

µA

µA

µA

- 4.5 to 5.5 - 2.4 - 3 mA

2