• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25
o
C
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Decoding
• Code Conversion
Pinouts
1/2 OF DUAL
1/2 OF DUAL
Q0
Q1
Q2
Q3
VSS
Q0
Q1
Q2
Q3
VSS
1
E
2
A
B
3
4
5
6
7
8
1
E
2
A
3
B
4
5
6
7
8
CD4556BMS
TOP VIEW
CD4555BMS
TOP VIEW
VDD
16
15
E
A
14
B
13
Q0
Q1
Q2
Q3
VDD
E
A
B
Q0
Q1
Q2
Q3
1/2 OF DUAL
1/2 OF DUAL
12
11
10
9
16
15
14
13
12
11
10
9
• Demultiplexing (Using Enable Input as a Data Input
• Memory Chip-Enable Selection
• Function Selection
Description
CD4555BMS and CD4556BMS are dual one-of-four decoders/demultiplexers. Each decoder has two select inputs (A
and B), an Enable input (
puts. On the CD4555BMS the outputs are high on select; on
the CD4556BMS the outputs are low on select.
When the Enable input is high, the outputs of the
CD4555BMS remain low and the outputs of the
CD4556BMS remain high regardless of the state of the
select inputs A and B. The CD4555BMS and CD4556BMS
are similar to types MC14555 and MC14556, respectively.
The CD4555BMS and CD4556BMS are supplied in these
16-lead outline packages:
Braze Seal DIP*H46†H4T
Frit Seal DIPH1E
Ceramic FlatpackH6W
*CD4555B Only†CD4556B Only
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETERSYMBOLCONDITIONSNOTESTEMPERATURE
Supply CurrentIDDVDD = 20V, VIN = VDD or GND1, 4+25
o
C-25µA
N Threshold VoltageVNTHVDD = 10V, ISS = -10µA1, 4+25oC-2.8-0.2V
N Threshold Voltage
∆VTNVDD = 10V, ISS = -10µA1, 4+25oC-±1V
Delta
P Threshold VoltageVTPVSS = 0V, IDD = 10µA1, 4+25oC0.22.8V
P Threshold Voltage
∆VTPVSS = 0V, IDD = 10µA1, 4+25oC-±1V
Delta
FunctionalFVDD = 18V, VIN = VDD or GND1+25oCVOH >
VDD/2
Propagation Delay TimeTPHL
VDD = 3V, VIN = VDD or GND
VDD = 5V1, 2, 3, 4+25oC-1.35 x
TPLH
VOL <
VDD/2
+25oC
Limit
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25oC limit.
4. Read and Record
UNITSMINMAX
UNITSMINMAX
V
ns
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC
PARAMETERSYMBOLDELTA LIMIT
Supply Current - MSI-2IDD± 1.0µA
Output Current (Sink)IOL5± 20% x Pre-Test Reading
Output Current (Source)IOH5A± 20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
MIL-STD-883
CONFORMANCE GROUP
METHODGROUP A SUBGROUPSREAD AND RECORD
Initial Test (Pre Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A
PDA (Note 1)100% 50041, 7, 9, Deltas
Interim Test 3 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A
PDA (Note 1)100% 50041, 7, 9, Deltas
7-1252
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