Intersil Corporation CD4527BMS Datasheet
CD4527BMS
December 1992
Features
• High Voltage Type (20V Rating)
• Cascadable in Multiples of 4-Bits
• Set to “9” Input and “9” Detect Output
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Standardized Symmetrical Output Characteristics
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Numerical Control
• Instrumentation
• Digital Filtering
• Frequency Synthesis
CMOS BCD Rate Multiplier
Description
CD4527BMS is a low power 4-bit digital rate multiplier that
provides an output pulse rate which is the clock input pulse
rate multiplied by 1/10 times the BCD input. For example,
when the BCD input is 8, there will be 8 output pulses for
every 10 input pulses. This device may be used to perform
arithmetic operations (add, subtract, divide, raise to a
power), solve algebraic and differential equations, generate
natural logarithms and trigonometric functions, A/D and D/A
o
C
conversion, and frequency division.
For fractional multipliers with more than one digit,
CD4527BMS devices may be cascaded in two different
modes: the Add mode and the Multiply mode (see Figures 9
and 11). In the Add mode,
Output Rate =
(Clock Rate) [0.1BCD1 + 0.01BCD2 + 0.001BCD3 + . . .]
In the Multiply mode, the fraction programmed into the first
rate multiplier is multiplied by the fraction programmed into
the second one,
9
e.g.
10 10 100
4
x
36
=
or 36 output
pulses for every 100 clock input pulses.
The CD4527BMS is supplied in these 16-lead outline packages:
Braze Seal DIP H4X
Frit Seal DIP H1F
Ceramic Flatpack H6W
Pinout
CD4527BMS
TOP VIEW
VDD
16
15
B
A
14
CLEAR
13
CASCADE
12
INHIBIT IN (CARRY)
11
STROBE
10
9
CLOCK
OUT
OUT
VSS
1
2
C
3
D
4
5
6
7
8
“9” OUT
SET TO “9”
INHIBIT OUT (CARRY)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Functional Diagram
CLOCK
11
INHIBIT
(CARRY) IN
4
SET TO
NINE
13
CLEAR
7-1216
9
÷10
COUNTER
7
BCD RATE
SELECT INPUTS
A
14B15C2D3
RATE
SELECT
LOGIC
“9” OUT
1
INHIBIT
(CARRY) OUT
STROBE
10
CASCADE
12
OUT
6
RATE
OUTPUTS
OUT
5
VSS = 8
VDD = 16
File Number 3343
Specifications CD4527BMS
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1)
Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC-10µA
VDD = 18V, VIN = VDD or GND 3 -55oC-10µA
Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25oC -100 - nA
VDD = 18V 3 -55oC -100 - nA
Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA
VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >
VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC
Input Voltage Low
(Note 2)
Input Voltage High
(Note 2)
Input Voltage Low
(Note 2)
Input Voltage High
(Note 2)
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs.
VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V
VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V
VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V
VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V
Thermal Resistance . . . . . . . . . . . . . . . . θ
Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K). . . . . .Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
GROUP A
SUBGROUPS TEMPERATURE
2 +125oC - 1000 µA
2 +125oC -1000 - nA
2 +125oC - 1000 nA
1, 2, 3 +25oC, +125oC, -55oC- 4 V
1, 2, 3 +25oC, +125oC, -55oC11 - V
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
ja
LIMITS
VDD/2
VOL <
VDD/2
θ
jc
UNITSMIN MAX
V
7-1217
Specifications CD4527BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
PARAMETER SYMBOL CONDITIONS (NOTE 1, 2)
Propagation Delay
Clock to Output
Propagation Delay
Clear to Output
Propagation Delay
Cascade to Output
Transition Time TTHL
Maximum Clock Input
Frequency
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC- 5 µA
Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA
Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA
Input Voltage Low VIL VDD = 10V, VOH > 9V , VOL < 1V 1, 2 +25oC, +125oC,
TPHL1
TPLH1
TPHL2
TPLH2
TPHL3
TPLH3
TTLH
FCL VDD = 5V, VIN = VDD or GND 9 +25oC 1.2 - MHz
VDD = 5V, VIN = VDD or GND 9 +25oC - 300 ns
VDD = 5V, VIN = VDD or GND 9 +25oC - 760 ns
VDD = 5V, VIN = VDD or GND 9 +25oC - 180 ns
VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
SUBGROUPS TEMPERATURE
10, 11 +125oC, -55oC - 405 ns
10, 11 +125oC, -55oC - 1026 ns
10, 11 +125oC, -55oC - 243 ns
10, 11 +125oC, -55oC - 270 ns
10, 11 +125oC, -55oC .89 - MHz
+125oC - 150 µA
+125oC - 300 µA
+125oC - 600 µA
-55oC
-55oC
-55oC
-55oC
-55oC 0.64 - mA
-55oC 1.6 - mA
-55oC 4.2 - mA
-55oC - -0.64 mA
-55oC - -2.0 mA
-55oC - -1.6 mA
-55oC - -4.2 mA
-55oC
LIMITS
UNITSMIN MAX
LIMITS
UNITSMIN MAX
-50mV
-50mV
4.95 - V
9.95 - V
-3V
7-1218
Specifications CD4527BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,
-55oC
Propagation Delay
Clock to Output
Propagation Delay
Clear to Output
Propagation Delay
Cascade to Output
Propagation Delay
Clock to Out
Propagation Delay
Clock to INHIBIT Out
Propagation Delay
Clock to INHIBIT Out
Propagation Delay
INHIBIT IN to
INHIBIT Out
Propagation Delay
Clock to “9” or “15” Out
Propagation Delay
Set to Out
Transition Time TTHL
Maximum Clock Input
Frequency
Minimum Data Setup
Time - Inhibit
Minimum Inhibit Removal
Time
Minimum Clock Pulse
Width
Maximum Clock Rise and
Fall Time
TPHL1
TPLH1
TPHL2
TPLH2
TPHL3
TPLH3
TPHL
TPLH
TPHL VDD = 5V 1, 2, 3 +25oC - 640 ns
TPLH VDD = 5V 1, 2, 3 +25oC - 500 ns
TPHL
TPLH
TPHL
TPLH
TPHL
TPLH
TTLH
FCL VDD = 10V 1, 2 +25oC 2.5 - MHz
TREM VDD = 5V 1, 2, 3 +25oC - 240 ns
TW VDD = 5V 1, 2, 3 +25oC - 330 ns
TRCL
TFCL
VDD = 10V 1, 2, 3 +25oC - 150 ns
VDD = 15V 1, 2, 3 +25oC - 120 ns
VDD = 10V 1, 2, 3 +25oC - 350 ns
VDD = 15V 1, 2, 3 +25oC - 260 ns
VDD = 10V 1, 2, 3 +25oC - 90 ns
VDD = 15V 1, 2, 3 +25oC - 70 ns
VDD = 5V 1, 2, 3 +25oC - 220 ns
VDD = 10V 1, 2, 3 +25oC - 110 ns
VDD = 15V 1, 2, 3 +25oC - 90 ns
VDD = 10V 1, 2, 3 +25oC - 290 ns
VDD = 15V 1, 2, 3 +25oC - 200 ns
VDD = 10V 1, 2, 3 +25oC - 200 ns
VDD = 15V 1, 2, 3 +25oC - 150 ns
VDD = 5V 1, 2, 3 +25oC - 260 ns
VDD = 10V 1, 2, 3 +25oC - 120 ns
VDD = 15V 1, 2, 3 +25oC - 90 ns
VDD = 5V 1, 2, 3 +25oC - 600 ns
VDD = 10V 1, 2, 3 +25oC - 250 ns
VDD = 15V 1, 2, 3 +25oC - 180 ns
VDD = 5V 1, 2, 3 +25oC - 660 ns
VDD = 10V 1, 2, 3 +25oC - 300 ns
VDD = 15V 1, 2, 3 +25oC - 220 ns
VDD = 10V 1, 2, 3 +25oC - 100 ns
VDD = 15V 1, 2, 3 +25oC - 80 ns
VDD = 15V 1, 2 +25oC 3.5 - MHz
TS VDD = 5V 1, 2, 3 +25oC - 100 ns
VDD = 10V 1, 2, 3 +25oC - 40 ns
VDD = 15V 1, 2, 3 +25oC - 20 ns
VDD = 10V 1, 2, 3 +25oC - 130 ns
VDD = 15V 1, 2, 3 +25oC - 110 ns
VDD = 10V 1, 2, 3 +25oC - 170 ns
VDD = 15V 1, 2, 3 +25oC - 100 ns
VDD = 5V 1, 2, 3, 4 +25oC-15µs
VDD = 10V 1, 2, 3, 4 +25oC-15µs
VDD = 15V 1, 2, 3, 4 +25oC-15µs
LIMITS
UNITSMIN MAX
+7 - V
7-1219
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