CD4508BMS
December 1992
Features
• High-Voltage Types (20-Volt Rating)
• Two Independent 4-Bit Latches
• Individual Master Reset for Each 4-Bit Latch
• 3-State Outputs with High-Impedance State for Bus
Line Applications
• Medium-Speed Operation: tPHL = tPLH = 70nS (Typ.)
at VDD = 10V and CL = 50pF
• 100% Tested for Quiescent Current at 20V
• 5V, 10V, and 15V Parametric Ratings
• Standardized, Symmetrical Output Characteristics
• Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and 25
o
C
• Noise Margin (Full Package-Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets all Requirements of JEDEC Tentative Standard
No. 13B, "Standard Specifications for Description of
‘B’ Series CMOS Devices"
Applications
• Buffer Storage
• Holding Registers
• Data Storage and Multiplexing
Description
CD4508BMS dual 4-bit latch contains two identical 4-bit
latches with separate STROBE, RESET, and OUTPUT
DISABLE controls. With the STROBE line in the high state,
the data on the "D" inputs appear at the corresponding "Q"
outputs provided the DISABLE line is in the low state.
Changing the STROBE line to the low state locks the data
into the latch. A high on the reset line forces the outputs to a
low level regardless of the state of the STROBE input. The
outputs are forced to the high-impedance state for bus line
applications by a high level on the DISABLE input.
CMOS Dual 4-Bit Latch
Pinout
CD4508BMS
TOP VIEW
D0A
Q0A
D1A
Q1A
D2A
Q2A
D3A
Q3A
VSS
4-BIT
LATCH
4-BIT
LATCH
1
2
3
4
5
6
7
8
9
10
11
12
RESET A
STROBE A
OUTPUT DISABLE A
Functional Diagram
OUTPUT
DISABLE
D0A
D1A
D2A
D3A
STROBE
RESET
OUTPUT
DISABLE
D0B
D1B
D2B
D3B
STROBE
RESET
24
VDD
Q3B
23
D3B
22
21
Q2B
20
D2B
19
Q1B
D1B
18
17
Q0B
D0B
16
15
OUTPUT DISABLE B
STROBE B
14
13
RESET B
3-STATE
OUTUTS
3-STATE
OUTUTS
Q0A
Q1A
Q2A
Q3A
Q0B
Q1B
Q2B
Q3B
The CD4508BMS is supplied in these 24 lead outline
packages:
Braze Seal DIP H4V
Frit Seal DIP H1Z
Ceramic Flatpack H4P
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-1148
File Number
3337
Specifications CD4508BMS
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range. . . . . . . . . . . . . . . . -55
Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . . -65
o
C to +125oC
o
C to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1)
Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC-10µA
VDD = 18V, VIN = VDD or GND 3 -55
Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25
VDD = 18V 3 -55oC -100 - nA
Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA
VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >
VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC
Input Voltage Low
VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V
(Note 2)
Input Voltage High
VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V
(Note 2)
Input Voltage Low
(Note 2)
Input Voltage High
(Note 2)
Tri-State Output
Leakage
VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V
VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V
IOZL VIN = VDD or GND
VOUT = 0V
VDD = 20V 1 +25oC -0.4 - µA
VDD = 18V 3 -55oC -0.4 - µA
Tri-State Output
Leakage
IOZH VIN = VDD or GND
VOUT = VDD
VDD = 20V 1 +25oC - 0.4 µA
VDD = 18V 3 -55oC - 0.4 µA
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs.
Thermal Resistance . . . . . . . . . . . . . . . . θ
Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70
ja
o
C/W 20oC/W
Maximum Package Power Dissipation (PD) at +125oC
= -55oC to +100oC (Package Type D, F, K) . . . . . .500mW
For T
A
For T
= +100oC to +125oC (Package Type D, F, K). . . . . .Derate
A
o
C
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
Linearity at 12mW/oC to 200mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
GROUP A
LIMITS
SUBGROUPS TEMPERATURE
2 +125oC - 1000 µA
o
C-10µA
o
C -100 - nA
2 +125oC -1000 - nA
2 +125oC - 1000 nA
VOL <
VDD/2
VDD/2
1, 2, 3 +25oC, +125oC, -55oC- 4 V
1, 2, 3 +25oC, +125oC, -55oC11 - V
2 +125oC -12 - µA
2 +125oC-12µA
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
θ
jc
UNITSMIN MAX
V
7-1149
Specifications CD4508BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
PARAMETER SYMBOL CONDITIONS
Propagation Delay
Strobe In to Data Out
Transition Time TTHL
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC- 5 µA
Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA
Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA
Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL <
Input Voltage High VIH VDD = 10V, VOH > 9V, VOL <
Propagation Delay
Strobe In to Data Out
TPHL1
TPLH1
TTLH
TPHL1
TPLH1
VDD = 5V, VIN = VDD or GND
(Note 1, 2)
VDD = 5V, VIN = VDD or GND
(Note 1, 2)
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
1V
1V
VDD = 10V 1, 2, 3 +25oC - 140 ns
VDD = 15V 1, 2, 3 +25oC - 100 ns
SUBGROUPS TEMPERATURE
9 +25oC - 260 ns
10, 11 +125oC, -55oC - 351 ns
9 +25oC - 200 ns
10, 11 +125oC, -55oC - 270 ns
+125oC - 150 µA
+125oC - 300 µA
+125oC - 600 µA
-55oC
-55oC
-55oC
-55oC
-55oC 0.64 - mA
-55oC 1.6 - mA
-55oC 4.2 - mA
-55oC - -0.64 mA
-55oC - -2.0 mA
-55oC - -1.6 mA
-55oC - -4.2 mA
1, 2 +25oC, +125oC,
-55oC
1, 2 +25oC, +125oC,
-55oC
LIMITS
UNITSMIN MAX
LIMITS
UNITSMIN MAX
-50mV
-50mV
4.95 - V
9.95 - V
-3V
+7 - V
7-1150