Intersil Corporation CD4504BMS Datasheet

December 1992

CD4504BMS

CMOS Hex Voltage Level Shifter for

TTL-to-CMOS or CMOS-to-CMOS Operation

Features

• High Voltage Type (20V Rating)

• Independence of Power Supply Sequence Consider­ations

- VCC can Exceed VDD

- Input Signals can Exceed Both VCC and VDD

• Up and Down Level Shifting Capability

• Shiftable Input Threshold for Either CMOS or TTL
Compatibility

• 100% Tested for Quiescent Current at 20V

• 5V, 10V and 15V Parametric Ratings

• Standardized Symmetrical Output Characteristics

• Maximum Input Current of 1µA at 18V Over Full Pack­age Temperature Range; 100nA at 18V and +25

o

C

• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”

Description

CD4504BMS hex voltage level shifter consists of six circuits
which shift input signals from the VCC logic level to the VDD
logic level. To shift TTL signals to CMOS logic levels, the
SELECT input is at the VCC HIGH logic state. When the
SELECT input is at a LOW logic state, each circuit translates
signals from one CMOS level to another.

The CD4504BMS is supplied in these 16-lead outline packages:

Pinout

CD4504BMS

TOP VIEW

1

VCC

AOUT

2

AIN

3

BOUT

4

BIN

5

COUT

6
7

CIN

VSS

8

Functional Diagram

VCC VDD

* IN

SELECT

*

13

TTL/CMOS

MODE SELECT

LEVEL

SHIFTER

VDD

16
15

FOUT
FIN

14

SELECT

13

EOUT

12

EIN

11

DOUT

10

9

DIN

VCC = PIN 1
VDD = PIN 16
VSS = PIN 8

OUT

(2, 4, 6, 10, 12, 15)(3, 5, 7, 9, 11, 14)

Frit Seal DIP H1F
Ceramic Flatpack H6W

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

7-1140

VDD

ALL INPUTS ARE PROTECTED

*

BY CMOS PROTECTION
NETWORK

VSS

File Number

3336

Specifications CD4504BMS

Absolute Maximum Ratings Reliability Information

DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V

(Voltage Referenced to VSS Terminals)

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V

DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA

Operating Temperature Range. . . . . . . . . . . . . . . . -55

Package Types D, F, K, H

Storage Temperature Range (TSTG). . . . . . . . . . . -65

o

C to +125oC

o

C to +150oC

Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265

At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for

10s Maximum

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS (NOTE 1)

Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25

VDD = 18V, VIN = VDD or GND 3 -55oC-2µA

Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25

VDD = 18V 3 -55oC -100 - nA

Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA

VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 4.5V, VCC = 2.8,

VIN = VDD or GND
VDD = 4.5V, VCC = 3.0,

VIN = VDD or GND
VDD = 18V, VCC = 18V,

VIN = GND or VCC
VDD = 18V, VCC = 4.5V,

VIN = VCC or GND
VDD = 4.5V, VCC = 18V,

VIN = VCC or GND
VDD = 20V, VCC = 20V,

VIN = GND or VCC
VDD = 20V, VCC = 4.5V,

VIN = VCC or GND
VDD = 4.5V, VCC = 20V,

VIN = VCC or GND

Thermal Resistance . . . . . . . . . . . . . . . . θ

Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W

Flatpack Package . . . . . . . . . . . . . . . . 70

Maximum Package Power Dissipation (PD) at +125oC

For TA = -55
For TA = +100

o

C

Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW

o

C to +100oC (Package Type D, F, K). . . . . . 500mW

o

C to +125oC (Package Type D, F, K) . . . . .Derate

Linearity at 12mW/oC to 200mW

ja

o

C/W 20oC/W

For TA = Full Package Temperature Range (All Package Types)

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

GROUP A

LIMITS

SUBGROUPS TEMPERATURE

o

C-2µA

2 +125oC - 200 µA

o

C -100 - nA

2 +125oC -1000 - nA

2 +125oC - 1000 nA

7 +25oC VOH >

VDD/2

VOL <
VDD/2

8B -55oC

8A +125oC

8A +125oC

8A +125oC

7 +25oC

7 +25oC

7 +25oC

θ

jc

UNITSMIN MAX

V

7-1141

Specifications CD4504BMS

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

PARAMETER SYMBOL CONDITIONS (NOTE 1)

Input Voltage Low
(Note 2) TTL-CMOS

Input Voltage High
(Note 2) TTL-CMOS

Input Voltage Low
(Note 2) CMOS-CMOS

Input Voltage High
(Note 2)CMOS-CMOS

Input Voltage Low
(Note 2) CMOS-CMOS

Input Voltage High
(Note 2) CMOS-CMOS

NOTES: 1. All voltages referenced to device GND, 100% testing being

implemented.

2. Go/No Go test with limits applied to inputs.

PARAMETER SYMBOL CONDITIONS (NOTE 1, 2)

Propagation Delay
TTL to CMOS
VDD > VCC

Propagation Delay
CMOS to CMOS VDD >
VCC

Propagation Delay
CMOS to CMOS VCC >
VDD

Propagation Delay
TTL to CMOS
VDD > VCC

Propagation Delay
CMOS to CMOS VDD >
VCC

Propagation Delay
CMOS to CMOS VCC >
VDD

Transition Time TTHL

NOTES:

1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

2. -55oC and +125oC limits guaranteed, 100% testing being implemented.

VIL VDD = 15V, VOH > 13.5V, VOL < 1V

VCC = 5V

VIH VDD = 15V, VOH > 13.5V, VOL < 1V

VCC = 5V

VIL VDD = 10V, VOH > 9V, VOL < 1V

VCC = 5V

VIH VDD = 10V, VOH > 9V, VOL < 1V

VCC = 5V

VIL VDD = 15V, VOH > 13.5V, VOL <

1.5V, VCC = 10V

VIH VDD = 15V, VOH > 13.5V, VOL <

1.5V, VCC = 10V

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

TPHL1 VDD = 10V, VIN = VCC or GND

VCC = 5V

TPHL2 VDD = 10V, VIN = VCC or GND

VCC = 5V

TPHL3 VDD = 5V, VIN = VCC or GND

VCC = 10V

TPLH1 VDD = 10V, VIN = VCC or GND

VCC = 5V

TPLH2 VDD = 10V, VIN = VCC or GND

VCC = 5V

TPLH3 VDD = 5V, VIN = VCC or GND

VCC = 10V

All Modes 9 +25oC - 200 ns

TTLH

GROUP A

SUBGROUPS TEMPERATURE

1, 2, 3 +25oC, +125oC, -55oC - 0.8 V

1, 2, 3 +25oC, +125oC, -55oC2 - V

1, 2, 3 +25oC, +125oC, -55oC - 1.5 V

1, 2, 3 +25oC, +125oC, -55oC 3.5 - V

1, 2, 3 +25oC, +125oC, -55oC- 3 V

1, 2, 3 +25oC, +125oC, -55oC7 - V

3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.

GROUP A

SUBGROUPS TEMPERATURE

9 +25oC - 280 ns

10, 11 +125oC, -55oC - 378 ns

9 +25oC - 240 ns

10, 11 +125oC, -55oC - 324 ns

9 +25oC - 550 ns

10, 11 +125oC, -55oC - 743 ns

9 +25oC - 280 ns

10, 11 +125oC, -55oC - 378 ns

9 +25oC - 240 ns

10, 11 +125oC, -55oC - 324 ns

9 +25oC - 400 ns

10, 11 +125oC, -55oC - 540 ns

10, 11 +125oC, -55oC - 270 ns

LIMITS

UNITSMIN MAX

LIMITS

UNITSMIN MAX

7-1142