Intersil Corporation CD4094BMS Datasheet

December 1992

CD4094BMS

CMOS 8-Stage Shift-and-Store

Bus Register

Features

• High Voltage Type (20V Rating)

• 3-State Parallel Outputs for Connection to Common
Bus

• Separate Serial Outputs Synchronous to Both Positive
and Negative Clock Edges for Cascading

• Medium Speed Operation - 5MHz at 10V (typ)

• Standardized Symmetrical Output Characteristics

• 100% Tested for Quiescent Current at 20V

• Maximum Input Current of 1µA at 18V Over Full Pack­age Temperature Range; 100nA at 18V and +25

o

C

• Noise Margin (Over Full Package/Temperature Range)

- 1V at VDD = 5V

- 2V at VDD = 10V

- 2.5V at VDD = 15V

• 5V, 10V and 15V Parametric Ratings

• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”

Applications

• Serial-to-Parallel Data Conversion

• Remote Control Holding Register

• Dual-Rank Shift, Hold, and Bus Applications

Pinout

CD4094BMS

TOP VIEW

DATA

Q1
Q2
Q3
Q4

VSS

1
2
3
4
5
6
7
8

STROBE

CLOCK

Functional Diagram

DATA 2
CLOCK 3

8-STAGE

SHIFT

REGISTER

16

VDD

15

OUTPUT ENABLE

14

Q5
Q6

13

Q7

12

Q8

11
10

Q’S

9

QS

SERIAL
OUTPUTS

109Q’S

QS

Description

CD4094BMS is a 8-stage serial shift register having a storage
latch associated with each stage for strobing data from the serial
input to parallel buffered 3-state outputs. The parallel outputs
may be connected directly to common bus lines. Data is shifted
on positive clock transitions. The data in each shift register stage
is transferred to the storage register when the STROBE input is
high. Data in the storage register appears at the outputs when­ever the OUTPUT-ENABLE signal is high.

Two serial outputs are available for cascading a number of
CD4094BMS devices. Data is available at the QS serial output
terminal on positive clock edges to allow for high-speed opera­tion in cascaded systems in which the clock rise time is fast. The
same serial information, available at the Q’S terminal on the next
negative clock edge, provides a means for cascading
CD4094BMS devices when the clock rise time is slow.

The CD4094BMS is supplied in these 16 lead outline packages:
Braze Seal DIP H4X

Frit Seal DIP H1F
Ceramic Flatpack H6W

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

7-1083

STROBE 1

OUTPUT
ENABLE 15

(TERMINALS 4, 5, 6, 7, 14, 13, 12, 11, RESPECTIVELY)

8-BIT

STORAGE

REGISTER

3-STATE

OUTPUTS

PARALLEL OUTPUTS Q1 - Q8

VDD = 16
VSS = 8

File Number

3194

Specifications CD4094BMS

Absolute Maximum Ratings Reliability Information

DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V

(Voltage Referenced to VSS Terminals)

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V

DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA

Operating Temperature Range. . . . . . . . . . . . . . . . -55

Package Types D, F, K, H

Storage Temperature Range (TSTG). . . . . . . . . . . -65

o

C to +125oC

o

C to +150oC

Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265

At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for

10s Maximum

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS (NOTE 1)

Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC-10µA

VDD = 18V, VIN = VDD or GND 3 -55

Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25

VDD = 18V 3 -55oC -100 - nA

Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA

VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >

VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC

Input Voltage Low

VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V

(Note 2)
Input Voltage High

VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V

(Note 2)
Input Voltage Low

(Note 2)
Input Voltage High

(Note 2)
Tri-State Output

Leakage

VIL VDD = 15V, VOH > 13.5V,

VOL < 1.5V

VIH VDD = 15V, VOH > 13.5V,

VOL < 1.5V

IOZL VIN = VDD or GND

VOUT = 0V

VDD = 20V 1 +25oC -0.4 - µA

VDD = 18V 3 -55oC -0.4 - µA
Tri-State Output

Leakage

IOZH VIN = VDD or GND

VOUT = VDD

VDD = 20V 1 +25oC - 0.4 µA

VDD = 18V 3 -55oC - 0.4 µA
NOTES: 1. All voltages referenced to device GND, 100% testing being

implemented.

2. Go/No Go test with limits applied to inputs.

Thermal Resistance . . . . . . . . . . . . . . . . θ

Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W

Flatpack Package . . . . . . . . . . . . . . . . 70

Maximum Package Power Dissipation (PD) at +125oC

For TA = -55
For TA = +100

o

C

Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW

o

C to +100oC (Package Type D, F, K). . . . . . 500mW

o

C to +125oC (Package Type D, F, K) . . . . .Derate

Linearity at 12mW/oC to 200mW

ja

o

C/W 20oC/W

For TA = Full Package Temperature Range (All Package Types)

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

GROUP A

LIMITS

SUBGROUPS TEMPERATURE

2 +125oC - 1000 µA

o

C-10µA

o

C -100 - nA

2 +125oC -1000 - nA

2 +125oC - 1000 nA

VOL <

VDD/2

VDD/2

1, 2, 3 +25oC, +125oC, -55oC- 4 V

1, 2, 3 +25oC, +125oC, -55oC11 - V

2 +125oC -12 - µA

2 +125oC-12µA

3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.

θ

jc

UNITSMIN MAX

V

7-1084

Specifications CD4094BMS

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS

Propagation Delay
Clock to Serial Output QS

Propagation Delay
Clock to Serial Output
Q’S

Propagation Delay
Clock to Parallel Output

Propagation Delay
Strobe to Parallel Output

Propagation Delay
Output Enable to Parallel
Output

Propagation Delay
Output Enable to Parallel
Output

Transition Time TTHL

Maximum Clock Input
Frequency

NOTES:

1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

2. -55oC and +125oC limits guaranteed, 100% testing being implemented.

3. CL = 50pF, RL = 1K, Input TR, TF < 20ns.

TPHL1
TPLH1

TPHL2
TPLH2

TPHL3
TPLH3

TPHL4
TPLH4

TPHZ
TPZH

TPLZ
TPZL

TTLH

FCL VDD = 5V, VIN = VDD or GND

VDD = 5V, VIN = VDD or GND
(Note 1, 2)

VDD = 5V, VIN = VDD or GND
(Note 1, 2)

VDD = 5V, VIN = VDD or GND
(Note 1, 2)

VDD = 5V, VIN = VDD or GND
(Note 1, 2)

VDD = 5V, VIN = VDD or GND
(Note 2, 3)

VDD = 5V, VIN = VDD or GND
(Note 2, 3)

VDD = 5V, VIN = VDD or GND
(Note 1, 2)

(Note 1, 2)

GROUP A

SUBGROUPS TEMPERATURE

9 +25oC - 600 ns

10, 11 +125oC, -55oC - 810 ns

9 +25oC - 460 ns

10, 11 +125oC, -55oC - 621 ns

9 +25oC - 840 ns

10, 11 +125oC, -55oC - 1134 ns

9 +25oC - 580 ns

10, 11 +125oC, -55oC - 783 ns

9 +25oC - 280 ns

10, 11 +125oC, -55oC - 378 ns

9 +25oC - 200 ns

10, 11 +125oC, -55oC - 270 ns

9 +25oC - 200 ns

10, 11 +125oC, -55oC - 270 ns

9 +25oC 1.25 - MHz

10, 11 +125oC, -55oC .93 - MHz

LIMITS

UNITSMIN MAX

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS

LIMITS

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC- 5 µA

+125oC - 150 µA

VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA

+125oC - 300 µA

VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA

+125oC - 600 µA

Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,

-55oC

Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,

-55oC

Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,

-55oC

Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,

-55oC

Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA

-55oC 0.64 - mA

Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA

-55oC 1.6 - mA

-50mV

-50mV

4.95 - V

9.95 - V

UNITSMIN MAX

7-1085

Specifications CD4094BMS

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

LIMITS

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA

-55oC 4.2 - mA

Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA

o

C - -0.64 mA

-55

Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125

o

C - -1.1 mA

-55oC - -2.0 mA

o

Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125

C - -0.9 mA

o

-55

C - -2.6 mA

Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA

-55oC--mA

Input Voltage Low VIL VDD = 10V , VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,

-3V

-55oC

Input Voltage High VIH VDD = 10V, VOH > 9V , VOL < 1V 1, 2 +25oC, +125oC,

7-V

-55oC

Propagation Delay
Clock to Serial Output Qs

Propagation Delay
Clock to Serial Output Q’s

Propagation Delay
Clock to Parallel Output

Propagation Delay
Strobe to Parallel Output

Propagation Delay
Output Enable to Parallel
Output

Propagation Delay
Output Enable to Parallel
Output

Transition Time TTLH

Maximum Clock Input
Frequency

Minimum Data Setup
Time

TPHL1
TPLH1

TPHL2
TPLH2

TPHL3
TPLH3

TPHL4
TPLH4

TPHZ
TPZH

TPLZ
TPZL

VDD = 10V 1, 2, 3 +25oC - 250 ns
VDD = 15V 1, 2, 3 +25oC - 190 ns
VDD = 10V 1, 2, 3 +25oC - 220 ns
VDD = 15V 1, 2, 3 +25oC - 150 ns
VDD = 10V 1, 2, 3 +25oC - 390 ns
VDD = 15V 1, 2, 3 +25oC - 270 ns
VDD = 10V 1, 2, 3 +25oC - 290 ns
VDD = 15V 1, 2, 3 +25oC - 200 ns
VDD = 10V 1, 2, 4 +25oC - 120 ns
VDD = 15V 1, 2, 4 +25oC - 90 ns

VDD = 10V 1, 2, 4 +25oC - 100 ns
VDD = 15V 1, 2, 4 +25oC - 80 ns

VDD = 10V 1, 2, 3 +25oC - 100 ns

TTHL

VDD = 15V 1, 2, 3 +25oC - 80 ns

FCL VDD = 10V 1, 2, 3 +25oC 2.5 - MHz

VDD = 15V 1, 2, 3 +25oC 3 - MHz

TS VDD = 5V 1, 2, 3 +25oC - 125 ns

VDD = 10V 1, 2, 3 +25oC - 55 ns
VDD = 15V 1, 2, 3 +25oC - 35 ns

Maximum Clock Input
Rise and Fall Time

TRCL
TFCL

VDD = 5V 1, 2, 3, 5 +25oC-15µs
VDD = 10V 1, 2, 3, 5 +25oC-5µs
VDD = 15V 1, 2, 3, 5 +25oC-5µs

Minimum Clock Pulse
Width

TW VDD = 5V 1, 2, 3 +25oC - 200 ns

VDD = 10V 1, 2, 3 +25oC - 100 ns
VDD = 15V 1, 2, 3 +25oC - 83 ns

UNITSMIN MAX

7-1086