Intersil Corporation CD4028BMS Datasheet

CD4028BMS

December 1992

Features

• High Voltage Type (20V Rating)

• BCD-to-Decimal Decoding or Binary-to-Octal Decoding

• High Decoded Output Drive Capability

• “Positive Logic” Inputs and Outputs - Decoded Out­puts Go High On Selection

• Medium-Speed Operation

- tPHL, tPLH = 80ns (typ) at VDD = 10V

• Standardized Symmetrical Output Characteristics

• 100% Tested For Quiescent Current at 20V

• Maximum Input Current of 1µA at 18V Over Full
Package-Temperature Range;

- 100nA at 18V and +25

o

C

• Noise Margin (Over Full Package T emperature Range):

- 1V at VDD = 5V

- 2V at VDD = 10V

- 2.5V at VDD = 15V

• 5V, 10V and 15V Parametric Ratings

• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”

Applications

• Code Conversion

• Indication-Tube Decoder

• Address Decoding - Memory Selection Control

Description

CMOS BCD-To-Decimal Decoder

Pinout

CD4028BMS

TOP VIEW

1

4

2

2

3

0

4

7

5

9

6

5

7

6

8

VSS

Functional Diagram

3-BIT

BINARY

INPUTS

BCD

INPUTS

10

A

13

B

12

C

11

D

16

VDD

15

3

14

1

13

B

12

C

11

D

10

A

9

8

V

DD

16

0
1
2
3
4
5
6
7
8
9

8

V

SS

3

14

2

15

1
6
7
4
9
5

BUFFERED
OCTAL
DECODED
OUTPUTS
(1 OF 8)

BUFFERED
DECIMAL
DECODED
OUTPUTS
(1 OF 10)

CD4028BMS types are BCD-to-decimal or binary-to-octal
decoders consisting of buffering on all 4 inputs, decoding
logic gates, and 10 output buffers. A BCD code applied to
the four inputs, A to D, results in a high level at the selected
one of 10 decimal decoded outputs. Similarly, a 3-bit binary
code applied to inputs A through C is decoded in octal code
at output 0 to 7 if D = “0”. High drive capability is provided at
all outputs to enhance dc and dynamic performance in high
fan-out applications.

The CD4028BMS is supplied in these 16-lead outline pack­ages:

Braze Seal DIP H4S
Frit Seal DIP H1E
Ceramic Flatpack H3X

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

7-788

File Number

3303

Specifications CD4028BMS

Absolute Maximum Ratings Reliability Information

DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V

(Voltage Referenced to VSS Terminals)

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V

DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA

Operating Temperature Range. . . . . . . . . . . . . . . . -55

Package Types D, F, K, H

Storage Temperature Range (TSTG). . . . . . . . . . . -65

o

C to +125oC

o

C to +150oC

Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265

At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for

10s Maximum

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS (NOTE 1)

Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25

VDD = 18V, VIN = VDD or GND 3 -55oC-10µA

Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25

VDD = 18V 3 -55oC -100 - nA

Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA

VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >

VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC

Input Voltage Low

VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V

(Note 2)
Input Voltage High

VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V

(Note 2)
Input Voltage Low

(Note 2)
Input Voltage High

(Note 2)

VIL VDD = 15V, VOH > 13.5V,

VOL < 1.5V

VIH VDD = 15V, VOH > 13.5V,

VOL < 1.5V

NOTES: 1. All voltages referenced to device GND, 100% testing being

implemented.

2. Go/No Go test with limits applied to inputs.

Thermal Resistance . . . . . . . . . . . . . . . . θ

Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W

Flatpack Package . . . . . . . . . . . . . . . . 70

Maximum Package Power Dissipation (PD) at +125oC

For TA = -55
For TA = +100

o

C

Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW

o

C to +100oC (Package Type D, F, K). . . . . . 500mW

o

C to +125oC (Package Type D, F, K) . . . . .Derate

Linearity at 12mW/oC to 200mW

ja

o

C/W 20oC/W

For TA = Full Package Temperature Range (All Package Types)

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

GROUP A

LIMITS

SUBGROUPS TEMPERATURE

o

C-10µA

2 +125oC - 1000 µA

o

C -100 - nA

2 +125oC -1000 - nA

2 +125oC - 1000 nA

VOL <

VDD/2

VDD/2

1, 2, 3 +25oC, +125oC, -55oC- 4 V

1, 2, 3 +25oC, +125oC, -55oC11 - V

3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.

θ

jc

UNITSMIN MAX

V

7-789

Specifications CD4028BMS

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

GROUP A

PARAMETER SYMBOL CONDITIONS (NOTE 1, 2)

Propagation Delay TPHL

TPLH

Transition Time TTHL

TTLH

NOTES:

1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

2. -55oC and +125oC limits guaranteed, 100% testing being implemented.

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC- 5 µA

Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,

Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,

Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,

Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,

Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA

Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA

Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA

Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA

Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA

Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA

Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA

Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,

Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,

VDD = 5V, VIN = VDD or GND 9 +25oC - 350 ns

VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS

VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA

VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA

SUBGROUPS TEMPERATURE

10, 11 +125oC, -55oC - 473 ns

10, 11 +125oC, -55oC - 270 ns

+125oC - 150 µA

+125oC - 300 µA

+125oC - 600 µA

-55oC

-55oC

-55oC

-55oC

-55oC 0.64 - mA

-55oC 1.6 - mA

-55oC 4.2 - mA

-55oC - -0.64 mA

-55oC - -2.0 mA

-55oC - -1.6 mA

-55oC - -4.2 mA

-55oC

-55oC

LIMITS

UNITSMIN MAX

LIMITS

UNITSMIN MAX

-50mV

-50mV

4.95 - V

9.95 - V

-3V

7-V

7-790

Specifications CD4028BMS

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

LIMITS

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

Propagation Delay TPHL

TPLH

Transition Time TTHL

TTLH

Input Capacitance CIN 1, 2 +25

NOTES:

1. All voltages referenced to device GND.

2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.

3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC-25µA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V
N Threshold Voltage

Delta
P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V
P Threshold Voltage

Delta
Functional F VDD = 18V, VIN = VDD or GND 1 +25oC VOH >

Propagation Delay Time TPHL

NOTES: 1. All voltages referenced to device GND.

2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

∆VTN VDD = 10V, ISS = -10µA 1, 4 +25oC-±1V

∆VTP VSS = 0V, IDD = 10µA 1, 4 +25oC-±1V

TPLH

VDD = 10V 1, 2, 3 +25oC - 160 ns
VDD = 15V 1, 2, 3 +25oC - 120 ns
VDD = 10V 1, 2, 3 +25oC - 100 ns

o

VDD = 15V 1, 2, 3 +25

VDD = 3V, VIN = VDD or GND
VDD = 5V 1, 2, 3, 4 +25oC - 1.35 x

3. See Table 2 for +25oC limit.

4. Read and Record

C - 80 ns

o

C - 7.5 pF

LIMITS

VOL <

VDD/2

VDD/2

+25oC

Limit

UNITSMIN MAX

UNITSMIN MAX

V

ns

TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC

PARAMETER SYMBOL DELTA LIMIT

Supply Current - MSI-2 IDD ± 1.0µA
Output Current (Sink) IOL5 ± 20% x Pre-Test Reading
Output Current (Source) IOH5A ± 20% x Pre-Test Reading

TABLE 6. APPLICABLE SUBGROUPS

MIL-STD-883

CONFORMANCE GROUP

Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A

PDA (Note 1) 100% 5004 1, 7, 9, Deltas

Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A

PDA (Note 1) 100% 5004 1, 7, 9, Deltas

METHOD GROUP A SUBGROUPS READ AND RECORD

7-791

Specifications CD4028BMS

TABLE 6. APPLICABLE SUBGROUPS (Continued)

MIL-STD-883

CONFORMANCE GROUP

Final Test 100% 5004 2, 3, 8A, 8B, 10, 11
Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11

Subgroup B-6 Sample 5005 1, 7, 9

Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3

NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.

CONFORMANCE GROUPS

Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4

FUNCTION OPEN GROUND VDD 9V ± -0.5V

Static Burn-In 1
Note 1

Static Burn-In 2
Note 1

Dynamic Burn­In Note 1

Irradiation
Note 2

NOTE:

1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V

2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V

1 - 7, 9, 14, 15 8, 10 - 13 16

1 - 7, 9, 14, 15 8 10 - 13, 16

- 8 16 1 - 7, 9, 14, 15 10, 12, 13 11

1 - 7, 9, 14, 15 8 10 - 13, 16

METHOD GROUP A SUBGROUPS READ AND RECORD

TABLE 7. TOTAL DOSE IRRADIATION

MIL-STD-883

METHOD

TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS

PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD

TEST READ AND RECORD

OSCILLATOR

50kHz 25kHz

7-792

Logic Diagram

A

CD4028BMS

0

3

*

10

1

14

2

2

*

13

B

*

12

C

*

11

D

VDD

*ALL INPUTS ARE PROTECTED

BY CMOS PROTECTION
NETWORK

VSS

TABLE 1. TRUTH TABLE

DCBA0123456789

00001000000000
00010100000000
00100010000000
00110001000000
01000000100000
01010000010000
01100000001000
01110000000100
10000000000010
10010000000001
10100000000000
10110000000000
11000000000000
11010000000000
11100000000000
11110000000000

1 = HIGH LEVEL 0 = LOW LEVEL

3

15

4

1

5

6

6

7

7

4

9

8

5

9

7-793

Typical Performance Characteristics

CD4028BMS

AMBIENT TEMPERATURE (TA) = +25oC

30

GATE-TO-SOURCE VOLTAGE (VGS) = 15V

25

20

15

10V

10

5

OUTPUT LOW (SINK) CURRENT (IOL) (mA)

5V

0 5 10 15

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

FIGURE 1. TYPICAL OUTPUT LOW (SINK) CURRENT

CAPACITANCE

AMBIENT TEMPERATURE (TA) = +25oC

300

250

200

150

SUPPLY VOLTAGE (VDD) = 5V

AMBIENT TEMPERATURE (TA) = +25oC

15.0

12.5

GATE-TO-SOURCE VOLTAGE (VGS) = 15V

10.0

7.5

10V

5.0

2.5

OUTPUT LOW (SINK) CURRENT (IOL) (mA)

5V

0 5 10 15

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

FIGURE 2. MINIMUM OUTPUT LOW (SINK) CURRENT

CAPACITANCE

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

AMBIENT TEMPERATURE (TA) = +25oC

GATE-TO-SOURCE VOLTAGE (VGS) = -5V

-10V

0-5-10-15

0

-5

-10

-15

-20

100

50

10V

15V

PROPAGATION DELAY TIME (tPHL, tPLH) (ns)

010 2030405060708090100

LOAD CAPACITANCE (CL) (pF)

FIGURE 3. TYPICAL PROPAGATION DELAY TIME AS A

FUNCTION OF LOAD CAPACITANCE

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

0-5-10-15

AMBIENT TEMPERATURE (TA) = +25oC

0

GATE-TO-SOURCE VOLTAGE (VGS) = -5V

-5

-10V

-15V

-10

-15

FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT

CHARACTERISTICS

-15V

FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT

CHARACTERISTICS

5

10

AMBIENT TEMPERATURE (TA) = +25oC

8
6

POWER DISSIPATION (PD) (µW)

4
2

4

10

8
6

4
2

3

10

8
6

4
2

2

10

8
6

4
2

SUPPLY VOLTAGE
(VDD) = 15V

10

OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)

11010210

INPUT FREQUENCY (fI) (kHz)

FIGURE 6. TYPICAL DYNAMIC POWER DISSIPATION AS A

FUNCTION OF INPUT FREQUENCY

5V

3

10V

10V

CL = 50pF
CL = 15pF

4

10

-25

-30

OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)

5

10

7-794

CD4028BMS

Typical Performance Characteristics (Continued)

AMBIENT TEMPERATURE (TA) = +25oC

200

150

100

50

TRANSITION TIME (tTHL, tTLH) (ns)

0

0 40 60 80 10020

SUPPLY VOLTAGE (VDD) = 5V

LOAD CAPACITANCE (CL) (pF)

FIGURE 7. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE

Typical Applications

The circuit shown in Figure 8 converts any 4-bit code to a
decimal or hexadecimal code. Table 2 shows a number of
codes and the decimal or hexadecimal number in these
codes which must be applied to the input terminals of the
CD4028BMS to select a particular output. For example: in
order to get a high on output number 8 the input must be
either an 8 expressed in 4-bit Binary code, a 15 expressed in
4-Bit Gray code, or a 5 expressed in Excess-3 code.

10V
15V

INPUTS

ABCD

CD4028BMS

0123456789

01234567

16 OUTPUTS

ABC D

0123456789

01234567

FIGURE 8. CODE CONVERSION CIRCUIT

1/6 CD4069B

CD4028BMS

TABLE 2. CODE CONVERSION CHART

INPUT CODES

HEXA-

INPUTS

DCBA

DECIMAL DECIMAL

4-BIT

4-BIT

GRAY

BINARY

GRAY

EXCESS-3

EXCESS-3

AIKEN

4-2-2-1

0123456789101112131415

OUTPUT NUMBER

0000 0 0 001000000000000000
0001 1 1 110100000000000000
0010 2 3 0 220010000000000000
0011 32033 0001000000000000
0100 47144 0000100000000000
0101 5 6 2 30000010000000000
0110 6431 40000001000000000
0111 7542 0000000100000000
1000 8 15 5 0000000010000000
1001 9 14 6 50000000001000000
101010 12 7 9 60000000000100000

7-795

CD4028BMS

TABLE 2. CODE CONVERSION CHART

(Continued)

INPUT CODES

HEXA-

INPUTS

DCBA

DECIMAL DECIMAL

4-BIT

4-BIT

GRAY

BINARY

GRAY

EXCESS-3

EXCESS-3

AIKEN

4-2-2-1

0123456789101112131415

OUTPUT NUMBER

101111 13 8 5 0000000000010000
110012 8 9 5 6 0000000000001000
110113 9 6 770000000000000100
111014 11 8 880000000000000010
111115 10 7 990000000000000001

TUBE REQUIREMENTS

NUMERAL

mA/

BCD

INPUTS

9

D

C

B

A

CD4028BMS

8
7
6
5
4
3
2
1
0

1 OF 10
NUMERALS

VT

BURROUGHS B4081 170 14

TRANSISTOR CHARACTERISTICS

TYPE VT(Vdc)

B4336/

170 2

718
B4032 170 14
B4021 120 14

Leakage with transistor cutoff ≤ 0.05mA

*(TRADEMARK) BURROUGHS CORP.

V(BR)CEO ≥ 70V

FIGURE 9. NEON READOUT (NIXIE TUBE*) DISPLAY APPLICATION

INPUTS

ABC D EF

ABC

CD4028BMS

0123456789

ABC

CD4028BMS

0123456789

01234567 8------15 16------23 24------31 32------39 40------47 48------55 56------63

D

ABC
CD4028BMS

0123456789

*1/6 CD4069B

INHIBIT
(NO SELECTION)

D

D

ABC
CD4028BMS

0123456789

D

ABC
CD4028BMS

0123456789

64 OUTPUTS (SELECTED OUTPUT IS HIGH)

D

ABC
CD4028BMS

0123456789

D

ABC
CD4028BMS

0123456789

D

ABC
CD4028BMS

0123456789

D

ABC
CD4028BMS

0123456789

********

D

FIGURE 10. 6-BIT BINARY TO 1-OF-64 ADDRESS DECODER

7-796

Chip Dimensions and Pad Layout

Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
as indicated. Grid graduations are in mils (10

CD4028BMS

-3

inch)

METALLIZATION: Thickness: 11kÅ − 14kÅ, AL.
PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

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797