Intersil Corporation CD40182BMS Datasheet

CD40182BMS

December 1992

Features

• High Voltage Type (20V Rating)

• Generates High-Speed Carry Across Four Adders or
Adder Groups

• High-Speed Operation

- tPHL, tPLH =100 ns (typ) at VDD = 10V

• Cascadable for Fast Carries Over N Bits

• Designed for Use with CD40181BMS ALU

• 100% Tested for Quiescent Current at 20V

• 5V, 10V and 15V Parametric Ratings

• Standardized Symmetrical Output Characteristics

• Maximum Input Current of 1µA at 18V Over Full Pack­age Temperature Range; 100nA at 18V and +25oC

• Noise Margin (Over Full Package/Temperature Range)

- 1V at VDD = 5V

- 2V at VDD = 10V

- 2.5V at VDD = 15V

• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”

CMOS Look-Ahead Carry Generator

Description

The CD40182BMS is a high-speed look-ahead carry gener­ator capable of anticipating a carry across four binary adders
or groups of adders. The CD40182BMS is cascadable to
perform full look-ahead across n-bit adders. Carry, propa­gate-carry, and generate-carry functions are provided as
enumerated in the terminal designation below.

The CD40182BMS, when used in conjuction with the
CD40181BMS arithmetic logic unit (ALU), provides full high­speed look-ahead carry capability for up to n-bit words. Each
CD40182BMS generates the look-ahead (anticipated carry)
across a group of four ALU’s. In addition, other
CD40182BMS’s may be employed to anticipate the carry
across sections of four look-ahead blocks up to n-bits. Carry
inputs and outputs of the CD40181BMS are active-high
logic, and carry-generate (G) and carry-propagate (P) out­puts are active-low. Therefore the inputs and outputs of the
CD40182BMS are compatible.

The CD40182BMS is supplied in these 16-lead outline
packages:

Braze Seal DIP H4V
Frit Seal DIP H1E
Ceramic Flatpack H6P

The CD40182BMS is similar to industry type MC14582.

Applications

• High-Speed Parallel Arithmetric Units

• Multi-Level Look-Ahead Carry Generation for Long
Word Lengths

Pinout

CD40182BMS

TOP VIEW

16
15
14
13
12
11
10

9

VDD
P2
G2
Cn
Cn + x
Cn + y
G
Cn + z

G1

P1

G0

P0

G3

P3

VSS

1
2
3
4
5
6
7

P

8

Functional Diagram

3

G0

1

G1
G2
G3

P0
P1
P2

P3

Cn

14

5

4
2

15

6

13

G

P

VDD = 16
VSS = 8

12

Cn + x

11

Cn + y

9

Cn + z

7

P

10

G

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

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File Number

3362

Specifications CD40182BMS

Absolute Maximum Ratings Reliability Information

DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V

(Voltage Referenced to VSS Terminals)

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V

DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA

Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC

Package Types D, F, K, H

Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC

Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC

At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for

10s Maximum

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS (NOTE 1)

Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC-10µA

VDD = 18V, VIN = VDD or GND 3 -55oC-10µA

Input Leakage Current IIL VIN = VDD or GND VDD = 20V 1 +25oC -100 - nA

VDD = 18V 3 -55oC -100 - nA

Input Leakage Current IIH VIN = VDD or GND VDD = 20V 1 +25oC - 100 nA

VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >

VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC

Input Voltage Low
(Note 2)

Input Voltage High
(Note 2)

Input Voltage Low
(Note 2)

Input Voltage High
(Note 2)

NOTES: 1. All voltages referenced to device GND, 100% testing being

implemented.

2. Go/No Go test with limits applied to inputs.

VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V

VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V

VIL VDD = 15V, VOH > 13.5V,

VOL < 1.5V

VIH VDD = 15V, VOH > 13.5V,

VOL < 1.5V

Thermal Resistance θ

Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W

Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W

Maximum Package Power Dissipation (PD) at +125oC

For TA = -55oC to +100oC (Package Type D, F, K) . . . . . .500mW

For TA = +100oC to +125oC (Package Type D, F, K). . . . . .Derate

Linearity at 12mW/oC to 200mW

Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW

For TA = Full Package Temperature Range (All Package Types)

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

GROUP A

SUBGROUPS TEMPERATURE

2 +125oC - 1000 µA

2 +125oC -1000 - nA

2 +125oC - 1000 nA

1, 2, 3 +25oC, +125oC, -55oC- 4 V

1, 2, 3 +25oC, +125oC, -55oC11 - V

3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.

ja

LIMITS

VDD/2

VOL <
VDD/2

θ

jc

UNITSMIN MAX

V

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Specifications CD40182BMS

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

GROUP A

PARAMETER SYMBOL CONDITIONS (NOTES 1, 2)

Propagation Delay
P, G In to P, G Out and
Carry Outs

Propagation Delay
Cn to Carry Outs

Transition Time TTHL

NOTES:

1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

2. -55oC and +125oC limits guaranteed, 100% testing being implemented.

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC- 5 µA

Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,

Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,

Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,

Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,

Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA

Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA

Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA

Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA

Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA

Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA

Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA

Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,

TPHL1
TPLH1

TPHL2
TPLH2

TTLH

VDD = 5V, VIN = VDD or GND 9 +25oC - 400 ns

VDD = 5V, VIN = VDD or GND 9 +25oC - 480 ns

VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS

VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA

VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA

SUBGROUPS TEMPERATURE

10, 11 +125oC, -55oC - 540 ns

10, 11 +125oC, -55oC - 648 ns

10, 11 +125oC, -55oC - 270 ns

+125oC - 150 µA

+125oC - 300 µA

+125oC - 600 µA

-55oC

-55oC

-55oC

-55oC

-55oC 0.64 - mA

-55oC 1.6 - mA

-55oC 4.2 - mA

-55oC - -0.64 mA

-55oC - -2.0 mA

-55oC - -1.6 mA

-55oC - -4.2 mA

-55oC

LIMITS

UNITSMIN MAX

LIMITS

UNITSMIN MAX

-50mV

-50mV

4.95 - V

9.95 - V

-3V

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