CD4006BMS
December 1992
Features
• High-Voltage Type (20V Rating)
• Fully Static Operation
• Shifting Rates Up to 12MHz at 10V (typ)
• Permanent Register Storage with Clock Line High or
Low - No Information Recirculation Required
• 100% Tested for Quiescent Current at 20V
• Standardized, Symmetrical Output Characteristics
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Package-Temperature Range; 100nA at 18V and +25
• Noise Margin (Full Package-Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standards No. 13B, “Standard Specifications for Description of “B” Series CMOS Devices”
CMOS 18-Stage Static Register
Pinout
CD4006BM
TOP VIEW
D1
1
2
D1 + 4’
D2
D3
D4
VSS
3
4
5
6
7
CLOCK
o
C
Functional Diagram
14
13
12
11
10
9
8
VDD
D1 + 4
D2 + 5
D2 + 4
D3 + 4
D4 + 5
D4 + 4
VDD
14
Applications
• Serial Shift Registers
• Frequency Division
• Time Delay Circuits
Description
CD4006BMS types are composed of 4 separate shift register
sections: two sections of four stages and two sections of five
stages with an output tap at the fourth stage. Each section has
an independent single-rail data path.
A common clock signal is used for all stages. Data are shifted
to the next stages on negative-going transitions of the clock.
Through appropriate connections of inputs and outputs, multiple register sections of 4, 5, 8, and 9 stages or single register
sections of 10, 12, 13, 14, 16, 17 and 18 stages can be implemented using one CD4006BMS package. Longer shift register
sections can be assembled by using more than one
CD4006BMS.
To facilitate cascading stages when clock rise and fall times are
slow, an optional output (D1 + 4’) that is delayed one-half clockcycle, is provided (see Truth Table for Output from Term. 2).
The CD4006BMS is supplied in these 14 lead outline packages:
Braze Seal DIP H4Q
Frit Seal DIP H6D
Ceramic Flatpack H4F
D1
D2
CLOCK
D3
D4
VSS
131
D1 + 4
2
D1 + 4’
12
D2 + 5
11
D2 + 4
10
D3 + 4
9
D4 + 5
8
D4 + 4
7
4
STAGE
LATCH
4
3
5
6
4
STAGE
4
STAGE
4
STAGE
1
STAGE
1
STAGE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-658
File Number
3290
Specifications CD4006BMS
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range. . . . . . . . . . . . . . . . -55
Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . . -65
o
C to +125oC
o
C to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1)
Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC-10µA
VDD = 18V, VIN = VDD or GND 3 -55
Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25oC -100 - nA
VDD = 18V 3 -55oC -100 - nA
Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA
VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >
VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC
Input Voltage Low
VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V
(Note 2)
Input Voltage High
VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V
(Note 2)
Input Voltage Low
(Note 2)
Input Voltage High
(Note 2)
VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V
VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs
Thermal Resistance . . . . . . . . . . . . . . . . θ
Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55
For TA = +100
o
C
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
o
C to +100oC (Package Type D, F, K). . . . . .500mW
o
C to +125oC (Package Type D, F, K) . . . . .Derate
Linearity at 12mW/oC to 200mW
ja
o
C/W 20oC/W
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
GROUP A
LIMITS
SUBGROUPS TEMPERATURE
o
2 +125
C - 1000 µA
o
C-10µA
2 +125oC -1000 - nA
2 +125oC - 1000 nA
VOL <
VDD/2
VDD/2
1, 2, 3 +25oC, +125oC, -55oC- 4 V
1, 2, 3 +25oC, +125oC, -55oC11 - V
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
θ
jc
UNITSMIN MAX
V
7-659
Specifications CD4006BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
PARAMETER SYMBOL CONDITIONS (NOTE 1, 2)
Propagation Delay TPHL
TPLH
Transition Time TTHL
TTLH
Maximum Clock Input
Frequency
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. 55oC and +125oC limits guaranteed, 100% testing being implemented.
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC- 5 µA
Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA
Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA
Input Voltage Low VIL VDD = 10V, VOH > 9V , VOL < 1V 1, 2 +25oC, +125oC,
Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,
FCL VDD = 5V 9 +25oC 2.5 - MHz
VDD = 5V, VIN = VDD or GND 9 +25oC - 400 ns
VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns
VIN = VDD or GND 10, 11 +125oC, -55oC 1.85 - MHz
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
SUBGROUPS TEMPERATURE
10, 11 +125oC, -55oC - 540 ns
10, 11 +125oC, -55oC - 270 ns
+125oC - 150 µA
+125oC - 300 µA
+125oC - 600 µA
-55oC
-55oC
-55oC
-55oC
-55oC 0.64 - mA
-55oC 1.6 - mA
-55oC 4.2 - mA
-55oC - -0.64 mA
-55oC - -2.0 mA
-55oC - -1.6 mA
-55oC - -4.2 mA
-55oC
-55oC
LIMITS
UNITSMIN MAX
LIMITS
UNITSMIN MAX
-50mV
-50mV
4.95 - V
9.95 - V
-3V
+7 - V
7-660