®
www.BDTIC.com/Intersil
CD22M3494
Data Sheet January 16, 2006
16 x 8 x 1 BiMOS-E Crosspoint Switch
The Intersil CD22M3494 is an array of 128 analog switches
capable of handling signals from DC to video. Because of
the switch structure, input signals may swing through the
total supply voltage range, V
switches may be addressed via the ADDRESS input to the 7
to 128 line decoder. The state of the addressed switch is
established by the signal to the DATA input. A low or zero
input will open the switch, while a high logic level or a one
will result in closure of the addressed switch when the
STROBE input goes high from its normally low state. Any
number or combination of connections may be active at one
time. Each connection, however, must be made or broken
individually in the manner previously described. All switches
may be reset by taking the RESET input from a zero state to
a one state and then returning it to its normal low state.
CS allows crosspoint array to be
expansion.
to VEE. Each of the 128
DD
cascaded for matrix
FN2793.7
Features
• 128 Analog Switches
•Low r
ON
• Guaranteed rON Matching
• Analog Signal Input Voltage Equal to the Supply Voltage
• Wide Operating Voltage . . . . . . . . . . . . . . . . . . 4V to 15V
• Parallel Input Addressing
• High Latch Up Current . . . . . . . . . . . . . . . . . . 50mA (Min)
• Very Low Crosstalk
• Pin and Functionally Compatible with the Following Types:
SGS M349
4 and Mitel MT8816
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• PBX Systems
• Instrumentation
• Analog and Digital Multiplexers
• Video Switching Networks
Block Diagram
AX0
AX1
AX2
AX3
AY 0
AY 1
AY 2
STROBE DATA RESET
CS
7 TO 128
DECODER
LATCHES
128
128
11
V
LEVEL
SHIFTERS
SS
V
DD
1
16 X 8
SWITCH
128
V
EE
ARRAY
Y0 - Y7
X0 - X15
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2000, 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Ordering Information
www.BDTIC.com/Intersil
CD22M3494
PART NUMBER PART MARKING
TEMP. RANGE
(°C) PACKAGE
PK G. DW G.
#
CD22M3494E CD22M3494E -40 to 85 40 Ld PDIP E40.6
CD22M3494EZ (See Note) CD22M3494EZ -40 to 85 40 Ld PDIP** (Pb-free) E40.6
CD22M3494MQ* CD22M3494MQ -40 to 85 44 Ld PLCC (Mitel Ld Compatible) N44.65
CD22M3494MQZ* (See Note) CD22M3494MQZ -40 to 85 44 Ld PLCC (Mitel Ld Compatible) (Pb-free) N44.65
CD22M3494MQA* CD22M3494MQA -40 to 85 44 Ld PLCC (Mitel Ld Compatible) N44.65
CD22M3494MQAZ* (See Note) CD22M3494MQAZ -40 to 85 44 Ld PLCC (Mitel Ld Compatible) (Pb-free) N44.65
CD22M3494SQ CD22M3494SQ -40 to 85 44 Ld PLCC (SGS Ld Compatible) N44.65
CD22M3494SQZ (See Note) CD22M3494SQZ -40 to 85 44 Ld PLCC (SGS Ld Compatible) (Pb-free) N44.65
*Add “96” suffix for tape and reel.
**Pb-free PDIPs can be used for through hole wave solder processing on
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material set
ly. They are not intended for use in Reflow solder processing. applications.
s; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
CD22M3494E
(PDIP)
TOP VIEW
(PLCC) (MIT
CD22M3494MQ
EL LEAD COMPATIBLE)
TOP VIEW
CD22M3494SQ
C) (SGS LEAD COMPATIBLE)
(PLC
TOP VIEW
AY2
RESET
AX3
AX0
X14
X15
X10
X11
NC
V
STROBE
V
Y3
X6
X7
X8
X9
Y7
SS
Y6
Y5
EE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
V
40
DD
39
Y2
DATA
38
Y1
37
36
CS
35
Y0
NC
34
33
X0
32
X1
X2
31
X3
30
X4
29
28
X5
27
X12
X13
26
AY1
25
24
AY0
23
AX2
22
AX1
Y4
21
X14
X15
X6
X7
X8
X9
X10
X11
NC
NC
Y7
NC
7
8
9
10
11
12
13
14
15
16
17
18 19 20 21 22 23 24 25 26 27 28
SS
V
AX0
Y6
RESET
AX3
Y5
STROBE
DD
AY2
Y3
Y4
EE
V
DATA
Y2
V
AX2
AX1
CS
Y1
4065 321444342414
X14
39
Y0
38
NC
37
X0
36
X1
35
X2
34
X3
33
X4
32
X5
X12
31
X13
30
NC
29
NC
AY0
AY1
7
8
X15
9
X6
X7
10
11
X8
12
X9
13
X10
14
X11
NC
15
NC
16
V
17
SS
Y718Y619Y5
AX0
5NC6
AX3
4
3
20
21
STROBE
RESET
AY2
2Y31
22Y423
EE
V
DD
V
44Y243
AX124AX2
25
DATA
42Y141Y040
27NC28
AY026AY1
CS
39
38
NC
37
X0
36
X1
35
X2
34
X3
33
X4
32
X5
X12
31
X13
30
NC
29
2
FN2793.7
January 16, 2006
CD22M3494
www.BDTIC.com/Intersil
Absolute Maximum Ratings Thermal Information
DC Supply Voltage (VDD)
Voltages Referenced to V
DC Supply Voltage (V
DD
Voltages Referenced to V
DC Input Diode Current, I
For VI, Digital < VSS -0.5V or VI,
Analog < V
DC Output Diode Current, I
-0.5V or VI > VDD 0.5V . . . . . . . . . . . . . . . . . . . . ±20mA
EE
For VO, Digital < VSS -0.5V or VO,
Analog < V
DC Transmission Gate Current .
-0.5V or VO > VDD 0.5V . . . . . . . . . . . . . . . . . . .±20mA
EE
. . . . . . . . . . . . . . . . . . . . -0.5 to 16V
EE
)
. . . . . . . . . . . . . . . . . . . . . -0.5, 16V
SS
IN
OK
. . . . . . . . . . . . . . . . . . . . . . . . . ±25mA
Power Dissipation Per Package (Po)
For T
For T
For T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
= -40°C to 85°C (PDIP). . . . . . . . . . . . . . . . . . . . . . 500mW
A
= 60°C to 85°C Derate Linearly . . . . . . . 12mW/°C to 200mW
A
= -40°C to 85°C (PLCC) . . . . . . . . . . . . . . . . . . . . . . .600mW
A
Thermal Resistance (Typical, Note 1)
PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Maximum Junction Temperature Plastic Package
Maximum Storage Temperature Range (T
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
). . . . . -65°C to 150°C
STG
(PLCC - Lead Tips Only)
*Pb-free PDIPs can be used for through hole wave solder processing
. They are not intended for use in Reflow solder processing.
only
applications.
Operating Conditions
Operating Temperature Range (TA)
Package Type E and Q . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
Supply Voltage Range
For T
V
DC Input or Output Voltage V
Digital Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . VSS to V
= Full Package Temperature Range
A
= 0V, VEE = 0V, VDD. . . . . . . . . . . . . . . . . . . . . . . 4V to 15V
SS
or VO. . . . . . . . . . . . . . . VEE to V
I
NOTE:
is measured with the component mounted on an evaluation PC board in free air.
1. θ
JA
Electrical Specifications T
= -40°C to 85°C, VDD = 5V, VSS = 0V, VEE = 0V, Unless Otherwise Specified
A
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
STATIC CONTROLS
Supply Current I
High-Level Input Voltage V
DD
VDD = 5V, Logic Inputs = V
VDD = 15V, Logic Inputs = V
VDD = 5V 2.4
IH
DD
DD
- - 2 mA
- - 5 mA
- - V
(Note 2)
Low-Level Input Voltage V
Input Leakage Current, Digital I
IL
IN
Reset = Low (Note 3) - - ±10
- - 0.8
(Note 2)
(Note 4)
θ
(°C/W)
JA
. . . . . . . . . . 150°C
DD
DD
V
µA
Electrical Specifications T
= -40°C to 85°C, VDD = 12V, VSS = 0V, VEE = 0V, Unless Otherwise Specified.
A
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
STATIC CROSSPOINTS
ON Resistance r
ON Resistance r
Difference in ON Resistance
Between Any Two Switches
ON
ON
∆r
ON
VSS = VEE = 0V,
= 25°C, VIN = VDD/2, VX
T
A
- VY = 0.2V
TA = -40°C to 85°C,
= VDD/2, VX -VY = 0.2V,
V
IN
V
= VEE = 0V
SS
TA = 25°C, VIN = VDD/2, VX - VY = 0.2V,
= VEE = 0V, VDD = 12V
V
SS
V
= 10V - 40 75 Ω
DD
= 12V - 36 65 Ω
V
DD
V
= 10V - 50 75 Ω
DD
= 12V - 45 65 Ω
V
DD
3
- 6 10 Ω
FN2793.7
January 16, 2006
CD22M3494
www.BDTIC.com/Intersil
Electrical Specifications T
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Difference in ON Resistance
Between Any Two Switches
OFF-State Leakage Current I
Electrical Specifications T
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
DYNAMIC CROSSPOINTS
Switch I/O Capacitance V
Switch Feedthrough Capacitance V
Propagation Delay Time (Switch ON)
Signal Input to Output, t
Frequency Response Channel ON
f = 20log (VX/VY) = -3dB
Total Harmonic, THD V
Feedthrough Channel OFF
Feedthrough = 20log (VX/VY) = F
Frequency for Signal Crosstalk, f
Attenuation of:
Control Crosstalk
DATA-Input, ADDRESS,
or STROBE to Output
PHL
or t
= -40°C to 85°C, VDD = 12V, VSS = 0V, VEE = 0V, Unless Otherwise Specified. (Continued)
A
∆r
ON
L
= 25°C, VSS = 0V, VEE = 0V, VDD = 14V, CL = 50pF, Unless Otherwise Specified.
A
PLH
DT
CT
40dB VIN = 2V
110dB VIN = 2V
TA = -40°C to 85°C, VIN = VDD/2,
VX - VY = 0.2V, V
V
= VEE = 0V, VDD = 12V
SS
|VX - VY| = 12V - - ±10
= VDD/2, f = 1MHz - - 20 pF
IN
= VDD/2, f = 1MHz - 0.3 - pF
IN
= 3pF, RL = 75Ω, VIN = 2V
C
L
= 2V
IN
P-P
VIN = 2V
Control Input = 3V
Square Wave, tR = tF = 10ns
R
= 1K, R
IN
P-P
P-P
P-P
= 12V
DD
P-P
, f = 1kHz - 0.01 - %
, f = 1kHz - -95 - dB
, RL = 75Ω - 10 - MHz
, RL = 1kΩ || 10pF - 5 - kHz
P-P
= 10kΩ || 10pF
OUT
- - 10 Ω
(Note 4)
- 5 30 ns
- 50 - MHz
- 75 - mV
µA
PEAK
Electrical Specifications T
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
DYNAMIC CONTROLS
Digital Input Capacitance C
Propagation Delay Time
STROBE to Output
Switch Turn-ON t
Switch Turn-OFF t
DATA-IN to Output
Turn-ON to High Level t
Turn-ON to Low Level t
ADDRESS to Output
Turn-ON to High Level t
Turn-OFF to Low Level t
= 25°C, VSS = 0V, VEE = 0V, VDD = 14V, RL = 1kΩ || 50pF, Unless Otherwise Specified.
A
IN
PSN
PSF
PZH
PZL
PAN
PAF
VIN = 5V, f = 1MHz - 5 - pF
- 50 100 ns
- 50 100 ns
- 60 100 ns
- 70 100 ns
- 70 - ns
- 70 - ns
4
FN2793.7
January 16, 2006
CD22M3494
www.BDTIC.com/Intersil
Electrical Specifications T
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Setup Time
CS to STROBE t
DATA-IN to STROBE t
ADDRESS to STROBE t
Hold Time
STROBE to CS t
ADDRESS to CS 10 - - ns
STROBE to DATA-IN t
STROBE to ADDRESS t
DATA-IN to CS 20 - - ns
Pulse Width
STROBE t
RESET t
RESET Turn-OFF to Output Delay t
NOTES:
2. Operation of V
3. Reset I
4. At 25
IH
°C Limit is ±100nA.
at 2.4V or VIL at 0.8V will result in much higher supply current (IDD) than for logic inputs equal to VDD or VSS respectively.
IH
< 20µA, Reset = VIH.
= 25°C, VSS = 0V, VEE = 0V, VDD = 14V, RL = 1kΩ || 50pF, Unless Otherwise Specified. (Continued)
A
CS
10 - - ns
DS
AS
CH
DH
AH
SPW
RPW
PHZ
10 - - ns
10 - - ns
10 - - ns
20 - - ns
10 - - ns
20 - - ns
20 - - ns
- 70 100 ns
5
FN2793.7
January 16, 2006
Timing Diagram
www.BDTIC.com/Intersil
CD22M3494
t
CS
t
CH
CS
ADDRESS
STROBE
DATA
RESET
SWITCH
OUTPUT
50% 50%
50% 50%
50%
t
SPW
t
AH
t
PSN
t
PSF
t
DS
50% 50%
t
PAF
t
PZL
t
PZH
t
PAN
t
AS
t
DH
90%
10%
t
RPW
50% 50%
t
PHZ
90%
10%
TRUTH TABLE X AXIS
X ADDRESS
AX3 AX2 AX1 AX0 X SWITCH
0 0 0 0 X0
0 0 0 1 X1
0 0 1 0 X2
0 0 1 1 X3
0 1 0 0 X4
0 1 0 1 X5
0 1 1 0 X12
0 1 1 1 X13
1 0 0 0 X6
1 0 0 1 X7
1 0 1 0 X8
1 0 1 1 X9
1 1 0 0 X10
1 1 0 1 X11
1 1 1 0 X14
1 1 1 1 X15
TRUTH TABLE Y AXIS
Y ADDRESS
AY 2 AY1 AY 0 Y SWITCH
0 0 0 Y0
0 0 1 Y1
0 1 0 Y2
0 1 1 Y3
1 0 0 Y4
1 0 1 Y5
1 1 0 Y6
1 1 1 Y7
6
FN2793.7
January 16, 2006
CD22M3494
www.BDTIC.com/Intersil
To make a connection (close switch) between any two points, specify an “X” address, a “Y” address, set “DATA” high, and switch
“STROBE” from low to high. To break a connection, follow this same procedure with “DATA” low.
Example:
To connect switch X3 to switch Y4:
To connect switch X6 to switch Y7:
To break connection from X3 to Y4:
Typical Performance Curve
ON RESISTANCE (Ω)
DATA
70
rON vs VIN AT -55°C, 25°C AND 85°C
V
= -6V, VSS = 0V, VDD = 6V
60
EE
50
85°C
40
30
20
10
25°C
-40°C
0
-8 -6 -4 -2 0 2 4 6 8
V
(V)
IN
X ADDRESS Y ADDRESS
AX3 AX2 AX1 AX0 AY 2 AY1 AY 0
1 0 0 1 1 1 0 0
1 1 0 0 0 1 1 1
0 0 0 1 1 1 0 0
Pin Descriptions
44 LD PLCC
SYMBOL
POWER SUPPLIES
V
DD
V
SS
V
EE
ADDRESS
AX0 - AX3 5, 22, 23 and 4 5, 24, 25 and 4 X Address Lines. These pins select one of
AY0 - AY 2 24, 25 and 2 26, 27 and 2 Y Address Lines. These pins select one of the 8 columns of switches. See
CONTROL
DATA 38 42 DATA Input determines the state of the addressed switch. A high or one
STROBE 18 20 STROBE Input enables the action define
RESET 3 3 MASTER RESET. A high or one on this line opens all switches.
CS 36 40 39 CHIP SELECT. Device is selected when CS is at a high level, allows the
40 LD PDIP
PIN NO.
40 44 44 Positive Supply.
16 18 17 Negative Supply (Digital).
20 22 22 Negative Supply (Analog).
PIN NO.
DESCRIPTIONMQ SQ
the Truth Table for the valid addresses.
ruth Table for the valid addresses.
the T
will close the switch. A low
Inputs. A low or zero results in no action. The ADDRESS Input must be
stable before the STROBE Input goes to the active high level. The DATA
Input must be stable on the failing edge of the STROBE.
int array to be cascaded for matrix expansion.
crosspo
or zero will open the switch.
the 16 rows of switches. See
d by the DATA and ADDRESS
7
FN2793.7
January 16, 2006
Pin Descriptions (Continued)
www.BDTIC.com/Intersil
SYMBOL
INPUTS/OUTPUTS
X0 - X5
1
X6 - X1
X12 - X15
Y0 - Y7
I/O
40 LD PDIP
PIN NO.
33-28, 8-13, 27,
26, 6, 7
35, 37, 39, 1, 21,
19, 17, 1
5
39, 41, 43, 1, 23,
Pinouts
CD22M3494E
(PDIP)
TOP VIEW
CD22M3494
44 LD PLCC
PIN NO.
DESCRIPTIONMQ SQ
37-32, 9-14, 31, 30, 7, 8 Analog or Digital Inputs/Outputs. These pins are the rows X0 - X15.
21, 19, 17
(PLCC) (MIT
40, 41, 43, 1, 23,
21, 19, 18
CD22M3494MQ
EL LEAD COMPATIBLE)
TOP VIEW
Analog or Digital Inputs/Outputs. These pins are the columns Y0 - Y7.
CD22M3494SQ
C) (SGS LEAD COMPATIBLE)
(PLC
TOP VIEW
AY2
RESET
AX3
AX0
X14
X15
X10
X11
NC
V
STROBE
V
Y3
X6
X7
X8
X9
Y7
SS
Y6
Y5
EE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
V
40
DD
39
Y2
DATA
38
Y1
37
36
CS
35
Y0
NC
34
33
X0
32
X1
X2
31
X3
30
29
X4
28
X5
27
X12
26
X13
25
AY1
24
AY0
23
AX2
22
AX1
Y4
21
X14
X15
X6
X7
X8
X9
X10
X11
NC
NC
Y7
NC
7
8
9
10
11
12
13
14
15
16
17
18 19 20 21 22 23 24 25 26 27 28
SS
V
AX0
Y6
RESET
AX3
Y5
STROBE
DD
AY2
Y3
Y4
EE
V
DATA
Y2
V
AX2
AX1
CS
Y1
4065 321444342414
X14
39
Y0
38
NC
37
X0
36
X1
35
X2
34
X3
33
X4
32
X5
X12
31
X13
30
NC
29
NC
AY0
AY1
7
8
X15
9
X6
X7
10
11
X8
12
X9
13
X10
14
X11
NC
15
NC
16
V
17
SS
Y718Y619Y5
5NC6
AX0
AX3
4
20
STROBE
RESET
3
21
AY2
2Y31
22Y423
EE
V
DD
V
44Y243
AX124AX2
25
DATA
42Y141Y040
27NC28
AY026AY1
CS
39
38
NC
37
X0
36
X1
35
X2
34
X3
33
X4
32
X5
X12
31
X13
30
NC
29
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
8
FN2793.7
January 16, 2006
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