Intersil Corporation CA3240, CA3240A Datasheet

CA3240, CA3240A
Data Sheet September 1998 File Number 1050.4
Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output
The CA3240A and CA3240 are dual versions of the popular CA3140 series integrated circuit operational amplifiers.They combine the advantages of MOS and bipolar transistors on the same monolithic chip. The gate-protected MOSFET (PMOS) input transistors provide high input impedance and a wide common-mode input voltage range (typically to 0.5V below the negative supply rail). The bipolar output transistors allow a wide output voltage swing and provide a high output current capability.
The CA3240A and CA3240 are compatible with the industry standard 1458 operational amplifiers in similar packages.The offset nullfeatureisavailableonly when these types are supplied in the 14 lead PDIP package (E1 suffix).
Ordering Information
TEMP.
PART NUMBER
RANGE (oC) PACKAGE
CA3240AE -40 to 85 8 Ld PDIP E8.3 CA3240AE1 -40 to 85 14 Ld PDIP E14.3 CA3240E -40 to 85 8 Ld PDIP E8.3
PKG.
NO.
Features
• Dual Version of CA3140
• Internally Compensated
• MOSFET Input Stage
- Very High Input Impedance (Z
- Very Low Input Current (I
- Wide Common-Mode Input Voltage Range (V
) 1.5T (Typ)
IN
) 10pA (Typ) at ±15V
I
ICR
): Can
Be Swung 0.5V Below Negative Supply Voltage Rail
• Directly Replaces Industry Type 741 in Most Applications
Applications
• Ground Referenced Single Amplifiers in Automobile and Portable Instrumentation
• Sample and Hold Amplifiers
• Long Duration Timers/Multivibrators (Microseconds­Minutes-Hours)
• Photocurrent Instrumentation
• Intrusion Alarm System • Active Filters
• Comparators • Function Generators
• Instrumentation Amplifiers • Power Supplies
Functional Diagram
2mA 4mA
BIAS CIRCUIT
CURRENT SOURCES
AND REGULATOR
+
IN-
PUT
A 10
-
OFFSET NULL
NOTE: Only available with 14 lead DIP (E1 Suffix).
A 10,000
12pF
A 1
C
1
Pinouts
CA3240, CA3240A (PDIP)
V+
OUTPUT (A)
INV.
INPUT (A)
NON-INV.
2mA1.6mA 2µA200µA200µA
OUT-
PUT
V-
INPUT (A)
INV.
INPUT (A)
NON-INV.
INPUT (A)
OFFSET
NULL (A)
OFFSET
NULL (B)
NON - INV.
INPUT (B)
INV.
INPUT (B)
Pins 9 and 13 internally connected through approximately 3.
TOP VIEW
1 2 3 4
V-
CA3240A (PDIP)
TOP VIEW
1 2 3 4
V-
5 6 7
8
V+ OUTPUT
7
INV.
6
INPUT (B) NON-INV.
5
INPUT (B)
OFFSET
14
NULL (A)
13
V+
OUTPUT (A)
12
NC
11
OUTPUT (B)
10
9
V+
OFFSET
8
NULL (B)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Copyright © Intersil Corporation 1999
CA3240, CA3240A
Absolute Maximum Ratings Thermal Information
Supply Voltage (Between V+ and V-). . . . . . . . . . . . . . . . . . . . . 36V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V)
Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA
Output Short Circuit Duration (Note 1). . . . . . . . . . . . . . . . Indefinite
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Voltage Range. . . . . . . . . . . . . . . . . . . . . 4V to 36V or ±2V to ±18V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Short circuit may be applied to ground or to either supply. Temperatures and/or supply voltages must be limited to keep dissipation within max­imum rating.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Thermal Resistance (Typical, Note 2) θJA (oC/W)
8 Lead PDIP Package . . . . . . . . . . . . . . . . . . . . . . . 100
14 Lead PDIP Package . . . . . . . . . . . . . . . . . . . . . . 100
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Electrical Specifications For Equipment Design, V
PARAMETER SYMBOL
Input Offset Voltage V Input Offset Current I Input Current I Large-Signal Voltage Gain
(See Figures 13, 28) (Note 3) Common Mode Rejection
Ratio (See Figure 18) Common Mode Input Voltage Range
(See Figure 25) Power Supply Rejection Ratio
(See Figure 20)
(∆VIO/∆V±)
Maximum Output Voltage (Note 4) (See Figures 24, 25)
Maximum Output Voltage (Note 5) V Total Supply Current
(See Figure 16) For Both Amps Total Device Dissipation P
NOTES:
3. At VO = 26V
, +12V, -14V and RL = 2k.
P-P
4. At RL = 2k.
5. At V+ = 5V, V- = GND, I
SINK
= 200µA.
IO
IO
I
A
OL
CMRR - 32 320 - 32 320 µV/V
V
ICR
PSRR
VOM+ 12 13 - 12 13 - V
VOM- -14 -14.4 - -14 -14.4 - V
OM-
I+ - 8 12 - 8 12 mA
D
- 5 15 - 2 5 mV
- 0.5 30 - 0.5 20 pA
- 10 50 - 10 40 pA 20 100 - 20 100 - kV/V 86 100 - 86 100 - dB
70 90 - 70 90 - dB
-15 -15.5 to
- 100 150 - 100 150 µV/V 76 80 - 76 80 - dB
0.4 0.13 - 0.4 0.13 - V
- 240 360 - 240 360 mW
SUPPLY
= ±15V, TA = 25oC, Unless Otherwise Specified
CA3240 CA3240A
11 -15 -15.5 to
+12.5
UNITSMIN TYP MAX MIN TYP MAX
12 V
+12.5
Electrical Specifications For Equipment Design, V
PARAMETER SYMBOL TEST CONDITIONS
Input Offset Voltage Adjustment Resistor (E1 Package Only)
Input Resistance R Input Capacitance C Output Resistance R Equivalent Wideband Input Noise Voltage
(See Figure 2)
2
I I
O
e
N
SUPPLY
= ±15V, TA = 25oC, Unless Otherwise Specified
TYPICAL VALUES
UNITSCA3240A CA3240
TypicalValueofResistorBetweenT erminals4and3(5) or Between 4 and 14(8) to Adjust Maximum V
IO
18 4.7 k
1.5 1.5 T 44pF
60 60
BW = 140kHz, RS = 1M 48 48 µV
CA3240, CA3240A
Electrical Specifications For Equipment Design, V
SUPPLY
= ±15V, TA = 25oC, Unless Otherwise Specified (Continued)
TYPICAL VALUES
PARAMETER SYMBOL TEST CONDITIONS
Equivalent Input Noise Voltage (See Figure 19)
e
f = 1kHz, RS = 100 40 40 nV/Hz
N
f = 10kHz, RS = 100 12 12 nV/Hz
UNITSCA3240A CA3240
Short-Circuit Current to Opposite Supply IOM+ Source 40 40 mA
IOM- Sink 11 11 mA
Gain Bandwidth Product (See Figures 14, 28) f
T
4.5 4.5 MHz
Slew Rate (See Figure 15) SR 9 9 V/µs Transient Response (See Figure 1) t
RL = 2k, CL = 100pF Rise Time 0.08 0.08 µs
r
OS RL = 2k, CL = 100pF Overshoot 10 10 %
Settling Time at 10V
(See Figure 26) t
P-P
AV = +1, RL = 2k, CL = 100pF,
S
Voltage Follower
To 1mV 4.5 4.5 µs To 10mV 1.4 1.4 µs
Crosstalk (See Figure 23) f = 1kHz 120 120 dB
Electrical Specifications For Equipment Design, at V
= ±15V, TA = -40 to 85oC, Unless Otherwise Specified
SUPPLY
TYPICAL VALUES
PARAMETER SYMBOL
UNITSCA3240A CA3240
Input Offset Voltage |VIO| 3 10 mV Input Offset Current (Note 8) |IIO|32 32pA Input Current (Note 8) I Large Signal Voltage Gain (See Figures 13, 28), (Note 6) A
I
OL
640 640 pA
63 63 kV/V 96 96 dB
Common Mode Rejection Ratio (See Figure 18) CMRR 32 32 µV/V
90 90 dB
Common Mode Input Voltage Range (See Figure 25) V
ICR
Power Supply Rejection Ratio (See Figure 20) PSRR
(VIO/V±)
-15 to +12.3 -15 to +12.3 V 150 150 µV/V
76 76 dB
Maximum Output Voltage (Note 7) (See Figures 24, 25) VOM+ 12.4 12.4 V
VOM- -14.2 -14.2 V Supply Current (See Figure 16) Total For Both Amps I+ 8.4 8.4 mA Total Device Dissipation P
D
252 252 mW
Temperature Coefficient of Input Offset Voltage VIO/T15 15µV/oC
NOTES:
6. At VO = 26V
, +12V, -14V and RL = 2k.
P-P
7. At RL = 2k.
8. At TA = 85oC.
Electrical Specifications For Equipment Design, at V+ = 5V, V- = 0V, T
= 25oC, Unless Otherwise Specified
A
TYPICAL VALUES
PARAMETER SYMBOL
UNITSCA3240A CA3240
Input Offset Voltage |VIO|2 5mV Input Offset Current |IIO| 0.1 0.1 pA Input Current I Input Resistance R Large Signal Voltage Gain (See Figures 13, 28) A
I
IN
OL
22pA
11T 100 100 kV/V 100 100 dB
3
CA3240, CA3240A
Electrical Specifications For Equipment Design, at V+ = 5V, V- = 0V, T
= 25oC, Unless Otherwise Specified (Continued)
A
TYPICAL VALUES
PARAMETER SYMBOL
UNITSCA3240A CA3240
Common-Mode Rejection Ratio CMRR 32 32 µV/V
90 90 dB
Common-Mode Input Voltage Range (See Figure 25) V
ICR
-0.5 -0.5 V
2.6 2.6 V
Power Supply Rejection Ratio PSRR 31.6 31.6 µV/V
90 90 dB
Maximum Output Voltage (See Figures 24, 25) VOM+3 3 V
VOM- 0.3 0.3 V
Maximum Output Current Source IOM+20 20mA
Sink IOM-1 1mA Slew Rate (See Figure 15) SR 7 7 V/µs Gain Bandwidth Product (See Figure 14) f
T
4.5 4.5 MHz Supply Current (See Figure 16) I+ 4 4 mA Device Dissipation P
D
20 20 mW
Test Circuits and Waveforms
50mV/Div., 200ns/Div.
Top Trace: Input, Bottom Trace: Output
Top Trace: Input, Bottom Trace: Output
5V/Div., 1µs/Div.
FIGURE 1A. SMALL SIGNAL RESPONSE FIGURE 1B. LARGE SIGNAL RESPONSE
+15V
10k
+ CA3240
-
-15V
2k
0.05µF
0.1µF
0.1µF
BW (-3dB) = 4.5MHz SR = 9V/µs
SIMULATED
100pF
LOAD
2k
FIGURE 1C. TEST CIRCUIT
FIGURE 1. SPLIT-SUPPLY VOLTAGE FOLLOWER TEST CIRCUIT AND ASSOCIATED WAVEFORMS
4
Test Circuits and Waveforms (Continued)
R
S
1M
CA3240, CA3240A
+15V
0.01µF
+ CA3240
-
30.1k
NOISE VOLTAGE OUTPUT
BW (-3dB) = 140kHz TOTAL NOISE VOLTAGE (REFERRED TO INPUT) = 48µV (TYP)
FIGURE 2. TEST CIRCUIT AMPLIFIER (30dB GAIN) USED FOR WIDEBAND NOISE MEASUREMENT
Schematic Diagram (One Amplifier of Two)
BIAS CIRCUIT INPUT STAGE SECOND STAGE OUTPUT STAGE DYNAMIC CURRENT SINK
D
1
Q
2
Q
5
D
3
D
4
R 8K
Q
1
Q
6
Q
7
1
Q
8
D
2
-15V
0.01µF
1k
V+
D
7
R
R 1K
9
50
R
10
Q
19
1K
R
11
20
8
Q
18
Q
3
Q
4
Q
17
Q
R
12
12K
Q
R
13
15K
20
D
8
R
14
20K
21
OUTPUT
INVERTING
NON-INVERTING
INPUT
INPUT
-
Q
+
R
2
500
Q
11
R
4
500
OFFSET NULL (NOTE 9)
NOTES:
9. Only available with 14 Lead DIP (E1 Suffix).
10. All resistance values are in ohms.
5
D
5
Q
10
9
R
3
500
Q
12
R
5
500
C
12pF
1
Q
Q
13
14
R
6
50
Q
Q
16
15
D
R
7
30
6
V-
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