Intersil Corporation CA3227 Datasheet

CA3227

Data Sheet May 2000

High-Frequency NPN Transistor Array For Low-Power Applications at Frequencies Up to 1.5GHz

The CA3227 consists of ﬁve general purpose silicon NPN transistors on a common monolithic substrate. Each of the transistors exhibits a value of f

in excess of 3GHz, making

them useful from DC to 1.5GHz. The monolithic construction of these devices provides close electrical and thermal matching of the ﬁve transistors.

Ordering Information

PART NUMBER (BRAND)

CA3227E -55 to 125 16 Ld PDIP E16.3 CA3227M

(3227) CA3227M96

(3227)

TEMP.

RANGE (oC) PACKAGE PKG. NO.

-55 to 125 16 Ld SOIC M16.15

-55 to 125 16 Ld SOIC Tape and Reel

M16.15

File Number 1345.5

Features

• Gain-Bandwidth Product (fT) . . . . . . . . . . . . . . . . . >3GHz

• Five Transistors on a Common Substrate

Applications

• VHF Ampliﬁers

• VHF Mixers

• Multifunction Combinations - RF/Mixer/Oscillator

• IF Converter

• IF Ampliﬁers

• Sense Ampliﬁers

• Synthesizers

• Synchronous Detectors

• Cascade Ampliﬁers

Pinout

CA3227

(PDIP, SOIC)

TOP VIEW

SUBSTRATE

1 2 3

4 5 6 7

15 14

13 12 11 10

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

CA3227

Absolute Maximum Ratings Thermal Information

Collector to Emitter Voltage (V Collector to Base Voltage (V Collector to Substrate Voltage (V

Collector Current (IC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA

Operating Conditions

Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTES:

1. The collector ofeachtransistor of thesedevicesis isolated from thesubstrate by an integraldiode. The substrate (Terminal5) must be connected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action.

2. θJA is measured with the component mounted on an evaluation PC board in free air.

). . . . . . . . . . . . . . . . . . . . . . . 8V

CEO

) . . . . . . . . . . . . . . . . . . . . . . . 12V

CBO

, Note 1) . . . . . . . . . . . . . . 20V

CIO

Thermal Resistance (Typical, Note 2) θJA (oC/W)

16 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 90

16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 185

Maximum Power Dissipation (Any One Transistor) . . . . . . . . 85mW

Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . 175oC

Maximum Junction Temperature (Plastic Package). . . . . . . . 150oC

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

Electrical Speciﬁcations T

= 25oC

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

DC CHARACTERISTICS FOR EACH TRANSISTOR

Collector to Base Breakdown Voltage V Collector to Emitter Breakdown Voltage V Collector to Substrate Breakdown Voltage V Emitter Cutoff Current (Note 3) I Collector Cutoff Current I Collector Cutoff Current I DC Forward Current Transfer Ratio h

(BR)CBOIC

(BR)CEOIC

(BR)CIO

EBO

CEO

CBO

= 10µA, IE = 0 12 20 - V

= 1mA, IB = 0 8 10 - V IC1 = 10µA, IB = 0, IE = 0 20 - - V VEB = 4.5V, IC = 0 - - 10 µA VCE = 5V, IB = 0 - - 1 µA VCB = 8V, IE = 0 - - 100 nA VCE = 6V IC = 10mA - 110 -

IC = 1mA 40 150 -

IC = 0.1mA - 150 Base to Emitter Voltage V Collector to Emitter Saturation Voltage V Base to Emitter Saturation Voltage V

CE SAT

BE SAT

VCE = 6V IC = 1mA 0.62 0.71 0.82 V IC = 10mA, IB = 1mA - 0.13 0.50 V IC = 10mA, IB = 1mA 0.74 - 0.94 V

NOTE:

3. On small-geometry, high-frequency transistors, it is very good practice never to take the Emitter Base Junction into reverse breakdown. To do so may permanently degrade the hFE. Hence, the use of I

rather than V

EBO

. These devices are also susceptible to damage by

(BR)EBO

electrostatic discharge and transients in the circuits in which they are used. Moreover, CMOS handling procedures should be employed.

CA3227

Electrical Speciﬁcations T

= 25oC, 200MHz, Common Emitter, Typical Values Intended Only for Design Guidance

PARAMETER SYMBOL TEST CONDITIONS

DYNAMIC CHARACTERISTICS FOR EACH TRANSISTOR

Input Admittance Y

Output Admittance Y

Forward Transfer Admittance Y

Reverse Transfer Admittance Y

Input Admittance Y

Output Admittance Y

Forward Transfer Admittance Y

Reverse Transfer Admittance Y

Small Signal Forward Current Transfer Ratio h

TYPICAL CAPACITANCE AT 1MHz, THREE-TERMINAL MEASUREMENT

Collector to Base Capacitance C Collector to Substrate Capacitance C Collector to Emitter Capacitance C Emitter to Base Capacitance C

CI CE EB

TYPICAL

VALUES UNITS

IC = 1mA, VCE = 5V 4 mS

0.75 mS

IC = 1mA, VCE = 5V 2.7 mS

0.13 mS

IC = 1mA, VCE = 5V 29.3 mS

-33 Degrees

IC = 1mA, VCE = 5V 0.38 mS

-97 Degrees

IC = 10mA, VCE = 5V 4.8 mS

2.85 mS

IC = 10mA, VCE = 5V 2.75 mS

0.9 mS

IC = 10mA, VCE = 5V 95 mS

-62 Degrees

IC = 10mA, VCE = 5V 0.39 mS

-97 Degrees IC = 1mA, VCE = 5V 7.1 IC = 10mA, VCE = 5V 17

VCB = 6V 0.3 pF VCI = 6V 1.6 pF VCE = 6V 0.4 pF VEB = 3V 0.75 pF

Spice Model (Spice 2G.6)

.model NPN + BF = 2.610E + 02 BR = 4.401E + 00 IS = 6.930E - 16 RB = 130.0E + 00 + RC = 1.000E + 01 RE = 7.396E - 01 VA = 6.300E + 01 VB = 2.208E + 00 + IK = 1.000E - 01 ISE = 1.87E - 14 NE = 1.653E + 00 IKR = 1.000E - 02 + ISC = 9.25E - 14 NC = 1.333E + 00 TF = 1.775E - 11 TR = 1.000E - 09 + CJS = 1.800E - 12 CJE = 1.010E - 12 PE = 8.350E - 01 ME = 4.460E - 01 + CJC = 9.100E - 13 PC = 3.850E - 01 MC = 2.740E - 01 KF = 0.000E + 00 + AF = 1.000E + 00 EF = 1.000E + 00 FC = 5.000E - 01 PJS = 5.410E - 01 + MJS = 3.530E - 01 RBM = 30.00 RBV = 100 IRB = 0.00 Please Note: No measurements have been made to model the reverse AC operation (tr is an estimation).

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