Intersil Corporation CA3098 Datasheet

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CA3098
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NO RECOMMENDED REPLACEMENT
Call Central Applications 1-800-442-7747
or email: centapp@harris.com
Programmable Schmitt Trigger with Memory, Dual Input Precision Level Detector
The CA3098 Programmable Schmitt Trigger is a monolithic silicon integrated circuit designed to control high operating current loads such as thyristors, lamps, relays, etc. The CA3098 can be operated with either a single power supply with maximum operating voltage of 16V, or a dual power supply with maximum operating voltage of ±8V. It can directly control currents up to 150mA and operates with microwatt standby power dissipation when the current to be controlled is less than 30mA. The CA3098 contains the following major circuit function features (see Block Diagram):
1. Differentialamplifiers and summer: the circuit uses two differential amplifiers, one to compare the input voltage with the “high” reference, and the other to compare the input with the “low” reference. The resultant output of the differentialamplifiersactuatesa summer circuit which de­liversa trigger that initiates a change in state of a flip-flop.
2. Flip-flop: the flip-flop functions as a bistable “memory” element that changes state in response to each trigger command.
3. Driver and output stages: these stages permitthe circuit to “sink” maximum peak load currents up to 150mA at ter­minal 3.
4. Programmable operating current: the circuit incorporates access at terminal 2 to permit programming the desired quiescent operating current and performance parameters.
Pinout
CA3098
(PDIP)
TOP VIEW
LOW REF.
I
BIAS
OUT
1 2 3 4
V-
1
8
+IN
7
HIGH REF.
6
V+
5
CURRENT CONTROL
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
January 1999 File Number 896.5
Features
• Programmable Operating Current
• Micropower Standby Dissipation
• Direct Control of Currents Up to. . . . . . . . . . . . . . . 150mA
• Low Input On/Off Current of Less Than 1nA for Programmable Bias Current of 1µA
• Built-in Hysteresis. . . . . . . . . . . . . . . . . . . . . . 20mV (Max)
Applications
• Control of Relays, Heaters, LEDs, Lamps, Photosensitive Devices, Thyristors, Solenoids, etc.
• Signal Reconditioning
• Phase and Frequency Modulators
• On/Off Motor Switching
• Schmitt Triggers, Level Detectors
• Time Delays
• Overvoltage, Overcurrent, Ov ertemperature Protection
• Battery-Operated Equipment
• Square and Triangular-Wave Generators
Part Number Information
PART
NUMBER
CA3098E -55 to 125 8 Ld PDIP E8.3
TEMP
RANGE (oC) PACKAGE PKG. NO.
© Harris Corporation 1999
Copyright
Block Diagram
“HIGH” REF. (HR)
SIGNAL INPUT
“LOW” REF. (LR)
Schematic Diagram
CA3098
PROGRAMMABLE
2
BIAS CURRENT INPUT (I
7
8
1
DIFF. AMP
DIFF. AMP
COMPARATOR
SUMMER
FLIP-FLOP (MEMORY)
)
BIAS
DRIVER OUTPUT
SUBSTRATE
6
V+
OUTPUT CURRENT CONTROL
5
“SINK
OUTPUT”
3
4
V-
“HIGH”
REF. (HR)
7
SIGNAL
INPUT
8
“LOW”
REF. (LR)
1
V-
4
6
OUTPUT CURRENT CONTROL
R
14
500
“SINK”
OUTPUT
Q
46
BIAS
V+
5
3
2
)
Q
8
Q
Q
6
Q
Q
7
9
10
Q
Q
1
Q
2
Q
5
Q
16
Q
Q
12
Q
4
Q
3
14
Q
15
Q
Q
17
Q
18
Q
20
Q
24
Q
11
Q
26
Q
34
19
Q
35
22
Q
27
Q
31
Q
32
Q
23
Q
25
Q
28
Q
30
Q
Q
33
Q
Q
36
Q
Q
39
Q
40
Q
41
29
Q
43
37
38
Q
Q
Q
44
R
3
50K
PROGRAMMABLE
BIAS CURRENT
INPUT (I
42
45
2
CA3098
Absolute Maximum Ratings Thermal Information
Supply Voltage Between V+ and V-. . . . . . . . . . . . . . . . . . . . . . .16V
Voltage Between High Reference or Sink Output and V-. . . . . . .16V
Differential Input Voltage Between Terminals 8 and 1 . . . . . . . . .10V
and Terminals 7 and 8
Load Current (Terminal 3) (Duty Cycle 25%). . . . . . . . . . . . 150mA
Input Current to Voltage Regulator (Terminal 5) . . . . . . . . . . . 25mA
Programmable Bias Current (Terminal 2) . . . . . . . . . . . . . . . . . 1mA
Output Current Control (Terminal 5) . . . . . . . . . . . . . . . . . . . . 15mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Voltage Range
+IN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V+
HIGH REF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V- +2.0V) to V+
LOW REF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) to (V+ -2.0V)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Resistance (Typical, Note 3) θ
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125oC/W
JA
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . .175oC
Maximum Junction Temperature (Plastic Package). . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Electrical Specifications T
= 25oC, Unless Otherwise Specified
A
CA3098
PARAMETER SYMBOL TEST CONDITIONS
Input Offset Voltage
“Low” Reference (Figures 2, 5) V
“High Reference (Figures 2, 6) V
IO(LR)VLR
IO(HR)VHR
= GND, VHR = V+ to (V- +2V),
I
= 100µA
BIAS
= GND, VLR = V- to (V+ -2V),
I
= 100µA
BIAS
-15 -3 6 mV
-10 -1 10 mV
Temperature Coefficient
“Low” Reference (Figure 7) -55oC to 125oC - 4.5 - µV/oC “High” Reference (Figure 8) -55oC to 125oC-±8.2 - µV/oC
Minimum Hysteresis
Voltage (Figure 9) V
IO(HR-
LR)
V
= 0V (Note 1), V+ = 4V, V- = -4V, I
REG
= 1µA
IAS
B-
- 3 20 mV
Temperature Coefficient (Figure 10) -55oC to 125oC - 6.7 - µV/oC
Output Saturation Voltage (Figures 11, 12)
Total Supply Current I
“ON” (Figures 3, 13, 14) VI = 6V, V
“OFF” (Figures 3, 13, 14) VI = 10V, V
Input Bias Current (Figures 3, 15) I
I
B(PNP)
I
B(NPN)
Output Leakage Current I Switching Times (Figures 4, 16-27) I
Delay Time t Fall Time t Rise Time t Storage Time t
Output Current (Note 2) I
V
CE(SAT)VI
TOTAL
IB
CE(OFF)
D
F
R
S
O
= 5V, V
I
= 100µA
BIAS
I
= 100µA
BIAS
V+ = 16V, I
VI = 16V, V V+ = 16V, I
VI = 6V, V I
= 100µA
BIAS
= 6V (Note 1), V+ = 12V,
REG
> 6V (Note 1), V+ = 16V,
REG
< 10V (Note 1),
REG
= 100µA
BIAS
< 16V (Note 1),
REG
= 100µA
BIAS
> 6V (Note 1), V+ = 16V,
REG
- 0.72 1.2 V
500 710 800 µA
400 560 750 µA
- 42 100 nA
- 28 100 nA
Current from Terminal 3 when Q46 is “OFF” - - 10 µA
= 100µA, V+ = 5V, V
BIAS
(Note 1)
REG
= 2.5V
- 900 - ns
-30-ns
- 2000 - ns
- 6.5 - µs
100 - - mA
NOTES:
1. For definition of V
see Figure 3.
REG
2. Continuous (DC) output current must be limited to 40mA. For 100mA output current, the duty cycle must be 40%.
3. θJA is measured with the component mounted on an evaluation PC board in free air.
UNITSMIN TYP MAX
3
CA3098
General Description of Circuit Operation
When the signal input voltage of the CA3098 is equal to or less than the “low” reference voltage (LR), current flowsfrom an external power supply through a load connected to Terminal 3 (“sink” output). This condition is maintained until the signal input voltage rises to or exceeds the “high” reference voltage (HR), thereby effecting a change in the state of the flip-flop (memory) such that the output stage interrupts current flow in the external load. This condition, in turn, is maintained until such time as the signal again becomes equal to or less than the “low” reference voltage.
The CA3098 comparator is unique in that it contains circuit provisions to permit programmability. This feature provides flexibility to the designer to optimize quiescent power consumption, input circuit characteristics, hysteresis, and additionally permits independent control of the comparator, namely, pulsing, strobing, keying, squelching, etc. Programmability is accomplished by means of the bias current (I
An auxiliary means of controlling the magnitude of load current flowat Terminal3 is provided by “sinking” current into Terminal 5. Figure 1 highlights the operation of the CA3098 when connected as a simple hysteresis switch (Schmitt trigger).
) supplied to Terminal 2.
BIAS
120k
R
B
2
“HIGH” REF. = 8V
7
INPUT
SIGNAL
E
IN
“LOW” REF. = 4V
INPUT SIGNAL
SEQUENCE
14≥ EIN > 0 0 28≥ EIN > 4 0 3E 28≥ EIN > 4 12 14≥ EIN > 0 0
FIGURE 1. BASIC HYSTERESIS SWITCH (SCHMITT
TRIGGER) AND RESULTANT OUTPUT STATES
8
1
LEVEL
> 8 12
IN
6
5
CA3098
4
OUTPUT VOLTAGE (V)
(TERMINAL 3)
V+ = 12V
3
DC
I
O
R
L
E
O
Metallization Mask Layout
0 102030 405058
61
60
50
40
30
20
10
0
63 (1.600)
66 (1.676)
Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10
-3
inch).
The layout represents a chip when it is part of the wafer. When the wafer is cut into chips, the cleavage angles are 57
o
of 90
with respect to the face of the chip. Therefore, the
o
instead
isolated chip is actually 7mils (0.17mm) larger in both dimensions.
4
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