Intersil Corporation ACTS630MS Datasheet
January 1996
ACTS630MS
Radiation Hardened EDAC
(Error Detection and Correction)
Features
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96721 and Intersil’s QM Plan
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
-10
• Single Event Upset (SEU) Immunity: <1 x 10
Errors/Bit/Day
(Typ)
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm
11
• Dose Rate Upset . . . . . . . . . . . . . . . . >10
• Dose Rate Survivability. . . . . . . . . . . >10
RAD (Si)/s, 20ns Pulse
12
RAD (Si)/s, 20ns Pulse
2
/mg
• Latch-Up Free Under Any Conditions
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55
o
C to +125oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current ≤ 1µA at VOL, VOH
• Fast Propagation Delay. . . . . . . . . . . . . . . . 37ns (Max), 24ns (Typ)
Description
The Intersil ACTS630MS is a Radiation Hardened 16-bit parallel error
detection and correction circuit. It uses a modified Hamming code to
generate a 6-bit check word from each 16-bit data word. The check word
is stored with the data word during a memory write cycle; during a
memory read cycle a 22-bit word is taken form memory and checked for
errors. Single bit errors in the data words are flagged and corrected. Single bit errors in check words are flagged but not corrected. The position
of the incorrect bit is pinpointed, in both cases, by the 6-bit error
syndrome code which is output during the error correction cycle.
The ACTS630MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of a radiation hardened,
high-speed, CMOS/SOS Logic Family.
Pinouts
28 PIN CERAMIC DUAL-IN-LINE, MIL-STD-1835
DESIGNATOR CDIP-T28, LEAD FINISH C
TOP VIEW
28
DEF
1
2
DB0
3
DB1
4
DB2
5
DB3
6
DB4
7
DB5
8
DB6
9
DB7
10
DB8
11
DB9
12
DB10
13
DB11
14
GND
28 PIN CERAMIC FLATPACK, MIL-STD-1835
DESIGNATOR CDFP3-F28, LEAD FINISH C
TOP VIEW
DEF
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VCC
27
SEF
26
S1
25
S0
24
CB0
23
CB1
CB2
22
21
CB3
20
CB4
19
CB5
18
DB15
17
DB14
16
DB13
15
DB12
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
SEF
S1
S0
CB0
CB1
CB2
CB3
CB4
CB5
DB15
DB14
DB13
DB12
The ACTS630MS is supplied in a 28 lead Ceramic Flatpack (K suffix) or
a 28 Lead Ceramic Dual-In-Line Package (D suffix).
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
5962F9672101VXC -55oC to +125oC MIL-PRF-38535 Class V 28 Lead SBDIP
5962F9672101VYC -55oC to +125oC MIL-PRF-38535 Class V 28 Lead Ceramic Flatpack
ACTS630D/Sample 25oC Sample 28 Lead SBDIP
ACTS630K/Sample 25oC Sample 28 Lead Ceramic Flatpack
ACTS630HMSR 25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
1
Spec Number 518786
File Number 3204.1
Function Tables
Control Functions
ACTS630MS
MEMORY
CYCLE
WRITE Low Low Generates Checkword Input Data Output Checkword Low Low
READ Low High Read Data and Check-
READ High High Latch and Flag Error Latch Data Latch Checkword Enabled Enabled
READ High Low Correct Data Word and
CONTROL
S1 S0 SEF DEF
EDAC FUNCTION DATA I/O CHECKWORD
Input Data Input Checkword Low Low
word
Generate Syndrome Bits
Output Corrected
Data
Output Syndrome
Bits
ERROR FLAGS
Enabled Enabled
Check Word Generation
16-BIT DATA WORD
CHECKWORD BIT
CB0 XX XX XXX X
CB1 XXXXXX X X
CB2 X X X X X X X X
CB3 XXX XX XXX
CB4 XXXXX XXX
CB5 XXXXXXXX
NOTE: The six check bits are parity bits derived from the matrix of data bits as indicated by “x” for each bit
0123456789101112131415
Error Syndrome Codes
ERROR LOCATIONS
SYNDROME
ERROR
CODE
CB0 LLHL LHHHLLLHHLHHLHHHHH H
CB1 LHLLHL LHLHHLHHLHHLHHHH H
CB2 HLLHLLHLHLHHLHHLHHLHHH H
CB3 LLLHHHL LHHLLLHHHHHHLHH H
CB4 HHHLLLLLHHHHHLLLHHHHLH H
CB5 HHHHHHHHLLLLLLLLHHHHHL H
DB CB
Error Functions
TOTAL NUMBER OF ERRORS ERROR FLAGS
DATA CORRECTION16-BIT DATA 6-BIT CHECKWORD SEF DEF
0 0 Low Low Not Applicable
1 0 High Low Correction
0 1 High Low Correction
1 1 High High Interrupt
2 0 High High Interrupt
0 2 High High Interrupt
NO
ERROR0123456789101112131415012345
Spec Number 518786
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