Intersil Corporation ACTS541T Datasheet

ACTS541T

Data Sheet July 1999 File Number

Radiation Hardened Octal Three-State
Buffer/Line Driver

Intersil’sSatellite Applications FlowTM(SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.

The Intersil ACTS541T is a Radiation Hardened Octal
Buffer/Line Driver, with three-state outputs. The output
enable pins

OE1, OE2 control the three-state outputs. If
either enable is high the output will be in a high impedance
state. For data output both enables must be low.

Specifications

Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.

Detailed Electrical Specifications for the ACTS541T are
contained in SMD 5962-96726. A “hot-link” is provided from
our website for downloading.

www.intersil.com/spacedefense/newsafc lasst.asp

Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.

www.semi.intersil.com/quality/manuals.asp

Ordering Information

TEMP.

ORDERING

NUMBER

5962R9672602TRC ACTS541DTR-02 -55 to 125

PART

NUMBER

RANGE

(oC)

4612.1

Features

• QML Class T, Per MIL-PRF-38535

• Radiation Performance

5

- Gamma Dose (γ) 1 x 10

RAD(Si)

- Latch-Up Free Under Any Conditions

- Single Event Upset (SEU) Immunity: <1 x 10

-10

Errors/Bit/Day (Typ)

- SEU LET Threshold . . . . . . . . . . . . .>100 MEV-cm

2

/mg

• 1.25 Micron Radiation Hardened SOS CMOS

• Significant Power Reduction Compared to ALSTTL Logic

• DC Operating Voltage Range. . . . . . . . . . . . 4.5V to 5.5V

• Input Logic Levels

-VIL = 0.8V Max

-V

= VCC/2 Min

IH

• Fast Propagation Delay . . . . . . . . 21ns (Max), 14ns (Typ)

Pinouts

ACTS541T (SBDIP), CDIP2-T20

TOP VIEW

OE1

A0
A1
A2
A3
A4
A5
A6
A7

GND

1
2
3
4
5
6
7
8
9

10

V

20

CC

OE2

19

Y0

18

Y1

17

Y2

16

Y3

15

Y4

14

Y5

13
12

Y6

11

Y7

5962R9672602TXC ACTS541KTR-02 -55 to 125

NOTE:

Minimumorderquantity for -T is 150 units through

distribution, or 450 units direct

.

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

ACTS541T (FLATPACK), CDFP4-F20

TOP VIEW

OE1

A0
A1
A2
A3
A4
A5
A6
A7

GND

www.intersil.com or 407-727-9207

120
2
3
4
5
6
7
8
9
10

V

CC

19
18
17
16
15
14
13
12
11

OE2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7

| Copyright © Intersil Corporation 1999

Functional Diagram

19

OE2

OE1

ACTS541T

V

2

A0

1

3

A1

4

A2

5

A3

6

A4

7

A5

CC

GND
V

CC

GND
V

CC

GND
V

CC

GND
V

CC

GND
V

CC

18

Y0

17

Y1

16

Y2

15

Y3

14

Y4

13

Y5

8

A6

GND

V

CC

10

20

A7

9

TRUTH TABLE

INPUTS OUTPUTS

OE1 OE2 An Yn

LLHH

LLLL
HXXZ
XHXZ

NOTE: L = Low Logic Level, H = High Logic Level, Z = High Impedance.

GND
V

CC

GND
V

CC

GND

12

Y6

11

Y7

2