Intersil Corporation ACTS244MS Datasheet
January 1996
ACTS244MS
Radiation Hardened Octal
Non-Inverting Three-State Buffer
Features
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96718 and Intersil’s QM Plan
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
-10
• Single Event Upset (SEU) Immunity: <1 x 10
Errors/Bit/Day
(Typ)
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm
11
• Dose Rate Upset . . . . . . . . . . . . . . . . >10
• Dose Rate Survivability. . . . . . . . . . . >10
RAD (Si)/s, 20ns Pulse
12
RAD (Si)/s, 20ns Pulse
2
/mg
• Latch-Up Free Under Any Conditions
o
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55
C to +125oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current ≤ 1µA at VOL, VOH
• Fast Propagation Delay. . . . . . . . . . . . . . . 14.5ns (Max), 10ns (Typ)
Description
The Intersil ACTS244MS is a Radiation Hardened Octal Non-Inverting
Three-State Buffer having two active low enable inputs.
The ACTS244MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of radiation hardened,
high-speed, CMOS/SOS Logic Family.
Pinouts
20 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T20,
LEAD FINISH C
TOP VIEW
1
AE
2
AI1
3
BO4
4
AI2
5
BO3
6
AI3
7
BO2
8
AI4
9
BO1
10
GND
20 PIN CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR CDFP4-F20,
LEAD FINISH C
TOP VIEW
AE
AI1
BO4
AI2
BO3
AI3
BO2
AI4
BO1
GND
120
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
19
18
17
16
15
14
13
12
11
VCC
BE
AO1
BI4
AO2
BI3
AO3
BI2
AO4
BI1
VCC
BE
AO1
BI4
AO2
BI3
AO3
BI2
AO4
BI1
The ACTS244MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or
a Dual-In-Line Ceramic Package (D suffix).
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
5962F9671801VRC -55oC to +125oC MIL-PRF-38535 Class V 20 Lead SBDIP
5962F9671801VXC -55oC to +125oC MIL-PRF-38535 Class V 20 Lead Ceramic Flatpack
ACTS244D/Sample 25oC Sample 20 Lead SBDIP
ACTS244K/Sample 25oC Sample 20 Lead Ceramic Flatpack
ACTS244HMSR 25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
1
Spec Number 518784
File Number 3187.1
Functional Diagram
ACTS244MS
AE
AI1
AI2
AI3
AI4
1(19)
2(11)
4(13)
6(15)
8(17)
NOTE: (1 CIRCUIT OF 2)
P
AO1
N
18(9)
P
AO2
N
16(7)
P
AO3
N
14(5)
P
AO4
N
12(3)
TRUTH TABLE
INPUTS OUTPUT
AE, BE AIn, BIn AOn, BOn
LLL
LHH
HXZ
NOTE: H = High Voltage Level, L = Low Voltage Level,
X = Immaterial, Z = High Impedance
Spec Number 518784
2
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