Intersil Corporation ACTS138MS Datasheet

December 1997

ACTS138MS

Radiation Hardened

TTL Input, 3-to-8 Line Decoder/Demultiplexer

Features

• QML Qualified Per MIL-PRF-38535 Requirements

• 1.25Micron Radiation Hardened SOS CMOS

• Radiation Environment

- Latch-up Free Under any Conditions

5

- Total Dose. . . . . . . . . . . . . . . . . . . . . .3 x 10

- SEU Immunity. . . . . . . . . . . <1 x 10

-10

RAD(Si)

Errors/Bit/Day

- SEU LET Threshold . . . . . . . . . . .>100MeV/(mg/cm

• Input Logic Levels . . . . . . . . . . V

= 0.8V, VIH = (Vcc/2)

IL

• Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±12mA

• Quiescent Supply Current. . . . . . . . . . . . . . . . . . . .20µA

• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . . . . .20ns

Applications

• Memory Decoding

• Data Routing

• Code Conversion

Description

The Radiation Hardened ACTS138MS is an Inverting 3-to-8
Line Decoder/Demultiplexer with three TTL level binary
select inputs (A
inputs determine which one of the eight normally high out­puts will go low.

Two active low and one active high enable inputs (
E

) are provided to make cascaded decoder designs easier

3

2

)

to implement.
The ACTS138MS is fabricated on a CMOS Silicon on Sap-

phire (SOS) process, which provides an immunity to Single
Event Latch-up and the capability of highly reliable perfor­mance in any radiation environment. These devices offer
significant power reduction and faster performance when
compared to ALSTTL types.

Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when or dering.

Detailed Electrical Specifications for the ACTS138 are
contained in SMD 5962-98535. A “hot-link” is provided
on our homepage with instructions for downloading.
http://www.intersil.com/data/sm/index.htm

, A1 and A2). If the device is enabled, these

0

E1, E2 and

Ordering Information

SMD PART NUMBER INTERSIL PART NUMBER TEMP. RANGE (oC) PACKAGE CASE OUTLINE

5962F9853501VEC ACTS138DMSR-02 -55 to 125 16 Ld SBDIP CDIP2-T16
N/A ACTS138D/Sample-02 25 16 Ld SBDIP CDIP2-T16
5962F9853501VXC ACTS138KMSR-02 -55 to 125 16 Ld Flatpack CDFP4-F16
N/A ACTS138K/Sample-02 25 16 Ld Flatpack CDFP4-F16
N/A ACTS138HMSR-02 25 Die N/A

Pinouts

ACTS138 (SBDIP)

1

A

0

2

A

1

3

A

2

4

E

1

5

E

2

6

E

3

7

Y

7

8

GND

TOP VIEW

16

V

CC

15

Y

0

14

Y

1

13

Y

2

12

Y

3

11

Y

4

10

Y

5

9

Y

6

A
A
A
E
E
E
Y

GND

0
1
2
1
2
3
7

ACTS138 (FLATPACK)

TOP VIEW

116
2
3
4
5
6
7
8

15
14
13
12
11
10

9

V

CC

Y

0

Y

1

Y

2

Y

3

Y

4

Y

5

Y

6

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

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File Number 4460

Die Characteristics

ACTS138MS

DIE DIMENSIONS:

Size: 2390µm x 2390µm (94 mils x 94 mils)
Thickness: 525µm ±25µm (20.6 mils ±1 mil)
Bond Pad: 110µm x 110µm (4.3 x 4.3 mils)

METALLIZATION: Al

Metal 1 Thickness: 0.7µm ±0.1µm
Metal 2 Thickness: 1.0µm ±0.1µm

SUBSTRATE POTENTIAL:

Unbiased Insulator

Metallization Mask Layout

A

2

A

1

PASSIVATION

Type: Phosphorous Silicon Glass (PSG)
Thickness: 1.30µm ±0.15µm

SPECIAL INSTRUCTIONS:

Bond V

CC

First

ADDITIONAL INFORMATION:

Worst Case Density: <2.0 x 10
Transistor Count: 256

ACTS138MS

A

V

0

CC

Y

0

5

Y

1

A/cm

2

E

1

E

2

E

3

Y

7

GND Y

Y

6

5

Y

2

Y

3

Y

4

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under an y patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

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