Intersil Corporation ACS521MS Datasheet
January 1996
ACS521MS
Radiation Hardened
8-Bit Magnitude Comparator
Features
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96709 and Intersil’ QM Plan
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
-10
• Single Event Upset (SEU) Immunity: <1 x 10
Errors/Bit/Day
(Typ)
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm
11
• Dose Rate Upset . . . . . . . . . . . . . . . . >10
• Dose Rate Survivability. . . . . . . . . . . >10
RAD (Si)/s, 20ns Pulse
12
RAD (Si)/s, 20ns Pulse
2
/mg
• Latch-Up Free Under Any Conditions
o
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55
C to +125oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current ≤ 1µA at VOL, VOH
• Fast Propagation Delay. . . . . . . . . . . . . . . . 15ns (Max), 10ns (Typ)
Description
The Intersil ACS521MS is a Radiation Hardened 8 bit magnitude comparator device. It provides a low output YB when Word A equals word B
and input GB is low. All other input states cause a high output.
The ACS521MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of radiation hardened,
high-speed, CMOS/SOS Logic Family.
Pinouts
20 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T20,
LEAD FINISH C
TOP VIEW
1
GB
A0
2
3
B0
4
A1
5
B1
6
A2
7
B2
8
A3
9
B3
10
GND
20 PIN CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR CDFP4-F20,
LEAD FINISH C
TOP VIEW
GB
A0
B0
A1
B1
A2
B2
A3
B3
GND
120
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
19
18
17
16
15
14
13
12
11
VCC
YB
B7
A7
B6
A6
B5
A5
B4
A4
VCC
YB
B7
A7
B6
A6
B5
A5
B4
A4
The ACS521MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or a
Ceramic Dual-In-Line Package (D suffix).
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
5962F9670901VRC -55oC to +125oC MIL-PRF-38535 Class V 20 Lead SBDIP
5962F9670901VXC -55oC to +125oC MIL-PRF-38535 Class V 20 Lead Ceramic Flatpack
ACS521D/Sample 25oC Sample 20 Lead SBDIP
ACS521K/Sample 25oC Sample 20 Lead Ceramic Flatpack
ACS521HMSR 25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
1
Spec Number 518821
File Number 3111.1
Functional Diagram
ACS521MS
8
A
B
+
8
GB
8
1
+
1
YB
TRUTH TABLE
INPUTS OUTPUT
GB A B YB
0A=BL
0A≠ BH
1XXH
NOTE: L = Low, H = High, X = Don’t Care
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under an y patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 518821
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