ACS27MS
Data Sheet July 1999
Radiation Hardened Triple 3-Input NOR Gate
The RadiationHardened ACS27MS is a Triple 3-Input NOR
Gate. For each gate, a HIGH level on any input results in a
LOW level on the Y output. A LOW level on all inputs
results in a HIGH level on the Y output. All inputs are
buffered and the outputs are designed for balanced
propagation delay and transition times.
The ACS27MS is fabricated on a CMOS Silicon on
Sapphire (SOS) process, which provides an immunity to
Single Event Latch-up and the capability of highly reliable
performance in any radiation environment. These devices
offer significant power reduction and faster performance
when compared to ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed belowmust be used when ordering.
Detailed Electrical Specifications for the ACS27MS are
contained in SMD 5962-98630. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/spaceselect.asp
File Number 4758
Features
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25 Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-Up Free Under Any Conditions
- Total Dose (Max.) . . . . . . . . . . . . . . . . . 3 x 10
- SEU Immunity. . . . . . . . . . . . .<1 x 10
-10
5
RAD(Si)
Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm
• Input Logic Levels. . . . V
= (0.3)(VCC), VIH = (0.7)(VCC)
IL
• Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . ±12mA (Min)
• Quiescent Supply Current . . . . . . . . . . . . . . . 5.0µA (Max)
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . .17ns (Max)
Applications
• High Speed Control Circuits
• Sensor Monitoring
• Low Power Designs
2
)
Ordering Information
INTERNAL MARKETING
ORDERING NUMBER
5962F9863001VCC ACS27DMSR-03 -55 to 125 14 Ld SBDIP CDIP2-T14
ACS27D/SAMPLE-03 ACS27D/SAMPLE-03 25 14 Ld SBDIP CDIP2-T14
5962F9863001VXC ACS27KMSR-03 -55 to 125 14 Ld Flatpack CDFP3-F14
ACS27K/SAMPLE-03 ACS27K/SAMPLE-03 25 14 Ld Flatpack CDFP3-F14
5962F9863001V9A ACS27HMSR-03 25 Die NA
NUMBER TEMP. RANGE (oC) PACKAGE DESIGNATOR
Pinouts
A1
B1
A2
B2
C2
Y2
GND
ACS27MS
(SBDIP)
TOP VIEW
1
2
3
4
5
6
7
14
V
CC
C1
13
12
Y1
C3
11
B3
10
A3
9
Y3
8
B1
A2
B2
C2
Y2
GND
ACS27MS
(FLATPACK)
TOP VIEW
1A1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
C1
Y1
C3
B3
A3
Y3
CC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Die Characteristics
ACS27MS
DIE DIMENSIONS:
Size: 2390µm x 2390µm (94 mils x 94 mils)
Thickness: 525µm ±25µm (20.6 mils ±1 mil)
Bond Pad: 110µm x 110µm (4.3 x 4.3 mils)
METALLIZATION: AI
Metal 1 Thickness: 0.7µm ±0.1µm
Metal 2 Thickness: 1.0µm ±0.1µm
SUBSTRATE POTENTIAL
Unbiased Insulator
Metallization Mask Layout
A2 (3)
PASSIVATION:
Type: Phosphorous Silicon Glass (PSG)
Thickness: 1.30µm ±0.15µm
SPECIAL INSTRUCTIONS
Bond V
ADDITIONAL INFORMATION:
Worst Case Current Density: <2.0 x 10
Transistor Count: 97
ACS27MS
B1 A1
(2) (1) (14) (13)
V
CC
C1
CC
First
(12) Y1
5
A/cm
2
B2 (4)
NC
C2 (5)
(6) (7) (8) (9)
A3Y3GNDY2
(11) C3
NC
(10) B3
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Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/orspecifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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