Intersil Corporation ACS257MS Datasheet

November 1997

ACS257MS

Radiation Hardened

Quad 2-Input Multiplexer with Three-State Outputs

Features

• QML Qualiﬁed Per MIL-PRF-38535 Requirements

• 1.25Micron Radiation Hardened SOS CMOS

• Radiation Environment

- Latch-up Free Under any Conditions

- Total Dose. . . . . . . . . . . . . . . . . . . . . .3 x 10

- SEU Immunity. . . . . . . . . . . <1 x 10

-10

RAD(Si)

Errors/Bit/Day

- SEU LET Threshold . . . . . . . . . . .>100MeV/(mg/cm

• Input Logic Levels . . .V

= (0.3)(VCC), VIH = (0.7)(VCC)

• Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±8mA

• Quiescent Supply Current. . . . . . . . . . . . . . . . . . .400µA

• Propagation Delay

- Enable to Output . . . . . . . . . . . . . . . . . . . . . . . . . 13ns

- Input or Address to Output . . . . . . . . . . . . . . . . . 14ns

Applications

• 4-Bit Source Selection

• Data Routing

• High Frequency Switching

Description

The Radiation Hardened ACS257MS is a Quad 2-Channel multiplexer which selects four bits of data from one of two sources under the control of a single select pin. The Output Enable input is active LOW and controls all outputs. When is set HIGH, all outputs are conﬁgured into a high impedance state, regardless of all other input conditions. All inputs are buffered and the outputs are designed for balanced propagation delay and transition times.

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The ACS257MS is fabricated on a CMOS Silicon on Sapphire (SOS) process, which provides an immunity to Single Event Latch-up and the capability of highly reliable performance in any radiation environment. These devices offer signiﬁcant power reduction and faster performance when compared to ALSTTL types.

Speciﬁcations for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when or dering.

Detailed Electrical Speciﬁcations for the ACS257 are contained in SMD 5962-98008. A “hot-link” is provided on our homepage with instructions for downloading. http://www.intersil.com/data/sm/index.htm

Ordering Information

SMD PART NUMBER INTERSIL PART NUMBER TEMP. RANGE (oC) PACKAGE CASE OUTLINE

5962F9800801VEC ACS257DMSR-02 -55 to 125 16 Ld SBDIP CDIP2-T16 N/A ACS257D/Sample-02 25 16 Ld SBDIP CDIP2-T16 5962F9800801VXC ACS257KMSR-02 -55 to 125 16 Ld Flatpack CDFP4-F16 N/A ACS257K/Sample-02 25 16 Ld Flatpack CDFP4-F16 N/A ACS257HMSR-02 25 Die N/A

Pinouts

ACS257 (SBDIP)

7 8

GND

TOP VIEW

4Y 3I

1I 1I

1Y 2I 2I

GND

0 1

ACS257 (FLATPACK)

TOP VIEW

116 2 3 4 5 6 7 8

15 14 13 12 11 10

V OE 4I 4I 4Y 3I 3I 3Y

0 1

File Number 4429

Die Characteristics

ACS257MS

DIE DIMENSIONS:

Size: 2390µm x 2390µm (94 mils x 94 mils) Thickness: 525µm ±25µm (20.6 mils ±1 mil) Bond Pad: 110µm x 110µm (4.3 x 4.3 mils)

METALLIZATION: Al

Metal 1 Thickness: 0.7µm ±0.1µm Metal 2 Thickness: 1.0µm ±0.1µm

SUBSTRATE POTENTIAL:

Unbiased Insulator

Metallization Mask Layout

PASSIVATION

Type: Phosphorous Silicon Glass (PSG) Thickness: 1.30µm ±0.15µm

SPECIAL INSTRUCTIONS:

Bond V

First

ADDITIONAL INFORMATION:

Worst Case Density: <2.0 x 10 Transistor Count: 212

ACS257MS

SVCCOE

A/cm

2Y GND 3Y 3I

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or speciﬁcations at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under an y patent or patent rights of Intersil or its subsidiaries.

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