Intersil Corporation ACS245MS Datasheet

January 1996
ACS245MS
Radiation Hardened Octal
Non-Inverting Bidirectional Bus Transceiver
Features
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96707 and Intersil’ QM Plan
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
-10
• Single Event Upset (SEU) Immunity: <1 x 10
Errors/Bit/Day
(Typ)
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm
11
• Dose Rate Upset . . . . . . . . . . . . . . . . >10
• Dose Rate Survivability. . . . . . . . . . . >10
RAD (Si)/s, 20ns Pulse
12
RAD (Si)/s, 20ns Pulse
2
/mg
• Latch-Up Free Under Any Conditions
o
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55
C to +125oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current 1µA at VOL, VOH
• Fast Propagation Delay. . . . . . . . . . . . . . . . 15ns (Max), 10ns (Typ)
Description
The Intersil ACS245MS is a Radiation Hardened octal non-inverting bidirectional bus transceiver intended for two-way asynchronous communication between data busses.
The ACS245MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
The ACS245MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or a Dual-In-Line Ceramic Package (D suffix).
Pinouts
DESIGNATOR CDIP2-T20, LEAD FINISH C
TOP VIEW
1
DIR
2
A0
3
A1
4
A2
5
A3
6
A4
7
A5
8
A6
9
A7
10
GND
20 PIN CERAMIC FLATPACK, MIL-STD-1835
DESIGNATOR CDFP4-F20, LEAD FINISH C
TOP VIEW
DIR
A0 A1 A2 A3 A4 A5 A6 A7
GND
120 2 3 4 5 6 7 8 9 10
20
VCC
19
OE
18
B0
17
B1
16
B2
15
B3
14
B4
13
B5
12
B6
11
B7
19 18 17 16 15 14 13 12 11
VCC OE B0 B1 B2 B3 B4 B5 B6 B7
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
5962F9670701VRC -55oC to +125oC MIL-PRF-38535 Class V 20 Lead SBDIP
5962F9670701VXC -55oC to +125oC MIL-PRF-38535 Class V 20 Lead Ceramic Flatpack
ACS245D/Sample 25oC Sample 20 Lead SBDIP
ACS245K/Sample 25oC Sample 20 Lead Ceramic Flatpack
ACS245HMSR 25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
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Spec Number 518780
File Number 3198.1
ACS245MS
)
Functional Diagram
A
OE
DIR
NOTE:(1 of 8
P
N
P
N
B
TRUTH TABLE
INPUTS
OPERATIONOE DIR
L L B Data to A Bus
L H A Data to B Bus
H X Isolation
NOTE: H = High Voltage Level, L = Low Voltage Level, X = Immaterial
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under an y patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 518780
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