Intersil Corporation ACS240MS Datasheet

March 1998

ACS240MS

Radiation Hardened

Inverting, Octal, Three-State Buffer/Line Driver

Features

• QML Qualified Per MIL-PRF-38535 Requirements

• 1.25Micron Radiation Hardened SOS CMOS

• Radiation Environment

- Latch-up Free Under any Conditions

- Total Dose. . . . . . . . . . . . . . . . . . . . . .3 x 10

- SEU Immunity. . . . . . . . . . . <1 x 10

-10

5

RAD(Si)

Errors/Bit/Day

- SEU LET Threshold . . . . . . . . . . .>100MeV/(mg/cm

• Input Logic Levels V

= (0.3V)(VCC), VIH = (0.7V)(VCC)

IL

• Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±16mA

• Quiescent Supply Current. . . . . . . . . . . . . . . . . . . .20µA

• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . . . 11.5ns

Applications

• Databus Driving

• Data Routing

• Redundant Data Control Circuitry

Ordering Information

Description

The Radiation Hardened ACS240MS is an Inverting, Octal,
Three-State Buffer/Line Driver with two active-LOW Enable
inputs (

AE and BE). Each Enable input controls four outputs.
When an Enable input is LOW, the corresponding outputs
are active and input signals are inverted. A HIGH on an
Enable input causes the corresponding outputs to be high
impedance, regardless of the input levels.

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The ACS240MS is fabricated on a CMOS Silicon on Sap-

)

phire (SOS) process, which provides an immunity to Single
Event Latch-up and the capability of highly reliable perfor­mance in any radiation environment. These devices offer
significant power reduction and faster performance when
compared to ALSTTL types.

Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when or dering.

Detailed Electrical Specifications for the ACS240 are
contained in SMD 5962-98540. A “hot-link” is provided
on our homepage with instructions for downloading.
http://www.intersil.com/data/sm/index.htm

SMD PART NUMBER INTERSIL PART NUMBER TEMP. RANGE (oC) PACKAGE CASE OUTLINE

5962F9854001VRC ACS240DMSR-02 -55 to 125 20 Ld SBDIP CDIP2-T20
N/A ACS240D/Sample-02 25 20 Ld SBDIP CDIP2-T20
5962F9854001VXC ACS240KMSR-02 -55 to 125 20 Ld Flatpack CDFP4-F20
N/A ACS240K/Sample-02 25 20 Ld Flatpack CDFP4-F20
N/A ACS240HMSR-02 25 Die N/A

Pinouts

ACS240 (SBDIP)

1

AE

2

AI1

3

BO4

4

AI2

5

BO3

6

AI3

7

BO2

8

AI4

9

BO1

10

GND

TOP VIEW

20

V

CC

19

BE

18

AO1

17

BI4

16

AO2

15

BI3

14

AO3

13

BI2

12

AO4

11

BI1

AE

AI1

BO4

AI2

BO3

AI3

BO2

AI4

BO1

GND

ACS240 (FLATPACK)

TOP VIEW

120
2
3
4
5
6
7
8
9
10

19
18
17
16
15
14
13
12
11

V

CC

BE
AO1
BI4
AO2
BI3
AO3
BI2
AO4
BI1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

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File Number 4478

Die Characteristics

ACS240MS

DIE DIMENSIONS:

Size: 2540µm x 2540µm (100 mils x 100mils)
Thickness: 525µm ±25µm (20.6 mils ±1 mil)
Bond Pad: 110µm x 110µm (4.3 x 4.3 mils)

METALLIZATION: Al

Metal 1 Thickness: 0.7µm ±0.1µm
Metal 2 Thickness: 1.0µm ±0.1µm

SUBSTRATE POTENTIAL:

Unbiased Insulator

Metallization Mask Layout

AI1

(2)

BO4 (3)

AI2 (4)

BO3 (5)

AI3 (6)

BO2 (7)

AI4 (8)

AE

(1)

PASSIVATION

Type: Phosphorous Silicon Glass (PSG)
Thickness: 1.30µm ±0.15µm

SPECIAL INSTRUCTIONS:

Bond V

CC

First

ADDITIONAL INFORMATION:

Worst Case Density: <2.0 x 10
Transistor Count: 198

ACS240MS

V

V

CC

CC

(20)

(20)

BE

(19)

5

A/cm

(18) AO1

(17) BI4

(16) AO2

(15) BI3

(14) AO3

(13) BI2

2

BO1 (9)

AO4 (12)

(10)

GND

(10)

GND

(11)

BI1

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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under an y patent or patent rights of Intersil or its subsidiaries.

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