January 1996
ACS03MS
Radiation Hardened Quad 2-Input
NAND Gate with Open Drain
Features
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96703 and Intersil’s QM Plan
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
-10
• Single Event Upset (SEU) Immunity: <1 x 10
Errors/Bit/Day
(Typ)
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm
11
• Dose Rate Upset . . . . . . . . . . . . . . . . >10
• Dose Rate Survivability. . . . . . . . . . . >10
RAD (Si)/s, 20ns Pulse
12
RAD (Si)/s, 20ns Pulse
2
/mg
• Latch-Up Free Under Any Conditions
o
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55
C to +125oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current ≤ 1µA at VOL, VOH
• Fast Propagation Delay. . . . . . . . . . . . . . . . 15ns (Max), 10ns (Typ)
Description
The Intersil ACS03MS is a Radiation Hardened quad 2-input NAND gate
with open drain outputs. The open drain output can drive resistive loads
from a separate supply voltage.
Pinouts
14 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T14,
LEAD FINISH C
TOP VIEW
A1
1
B1
2
Y1
3
A2
4
B2
5
Y2
6
GND
7
14 PIN CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR CDFP3-F14,
LEAD FINISH C
TOP VIEW
A1
B1
Y1
A2
B2
Y2
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
14
13
12
11
10
9
8
VCC
B4
A4
Y4
B3
A3
Y3
VCC
B4
A4
Y4
B3
A3
Y3
The ACS03MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of a radiation hardened,
high-speed, CMOS/SOS Logic Family.
The ACS03MS is supplied in a 14 lead Ceramic Flatpack (K suffix) or a
Ceramic Dual-In-Line Package (D suffix).
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
5962F9670301VCC -55oC to +125oC MIL-PRF-38535 Class V 14 Lead SBDIP
5962F9670301VXC -55oC to +125oC MIL-PRF-38535 Class V 14 Lead Ceramic Flatpack
ACS03D/Sample 25oC Sample 14 Lead SBDIP
ACS03K/Sample 25oC Sample 14 Lead Ceramic Flatpack
ACS03HMSR 25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
1
Spec Number 518779
File Number 3064.1
Functional Diagram
ACS03MS
An
Yn
Bn
TRUTH TABLE
INPUTS OUTPUT
An Bn Yn
L L Z (Note 2), H (Note 3)
L H Z (Note 2), H (Note 3)
H L Z (Note 2), H (Note 3)
HH L
NOTES:
1. L = Low, H = High, Z = High Impedance
2. Without Pull-up Resistor
3. With Pull-up Resistor
Spec Number 518779
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