Note 1: In the case of CMOS output type; when the voltage is forced to VDD from 0.7V to (+V
Note 2: VDD value when Output Voltage is equal or less than 0.1V. In the case of Nch open drain output type, the output pin is pulled
edge of VDD and the reaching point at 50% of Output Voltage. In the case of Nch open drain output type : The output pin is
pulled up to 5V through 470kΩ,and when the voltage is forced to VDD from 0.7V to (+V
ing edge of VDD and the reaching point ar 50% of Output Voltage.
up to 5V through 470kΩ resistor.
Condition 1: Topt=25°C
Condition 2: -40°C≤Topt≤85°C
Detector Threshold
Hysteresis
[V]
HYS
Supply Current 1Supply Current 2
[µµµµA]I
I
SS1
SS2
[µµµµA]
0.82.4
DD
V
=
DET
(-V
)
-0.10V
0.92.71.13.3
DD
V
DET
(-V
-0.13V
DD
V
DET
(-V
=
)
1.03.01.23.6
=
)
1.13.31.33.9
DD
V
DET
(-V
+2.0V
=
)
-0.16V
DD
V
=
DET
)
(-V
1.23.6
-0.20V
)+2.0V, time interval between the rising
DET
)+2.0V, time interval between the ris-
DET
0.92.7
1.03.0
1.44.2
8
R3111xxxxA/C
Output Current 1Output Current 2
I
[mA]I
OUT1
ConditionMin.Typ.
Condition
VDD=
0.85V
VDD=
1.0V
Nch
DS
V
0.5V
=
DD
V
DS
V
V
Nch
=0.05V
DD
=0.7V
0.010.05
1.5V
OUT2
[mA]
Output Delay
Time
[µµµµs]
t
PLH
Minimum Operat-
ing Voltage
V
[V]
DDL
Detector Threshold Tem-
perature Coefficient
∆∆∆∆-V
DET
Min.Typ.Max.Typ.Max.ConditionTyp.
0.050.5
0.21.0
=
1.02.0
Note 1
100
Note 2
Condi-
tion 1
Condi-
tion 2
0.55
0.65
Note 2
Condi-
tion 1
0.70
Condi-
tion 2
0.80
-40°C≤
To p t
≤85°C
/∆∆∆∆T[ppm/°°°°C]
±100
9
R3111xxxxA/C
OPERATION
V
DD
Supply Voltage
(VDD)
Output Voltage
(V
OUT)
Vref
Released Voltage(+V
Detector Threshold(-V
Minimum Operating Voltage
GND
GND
DET)
DET)
Ra
Rb
Comparator
Rc
Figure 1. Block Diagram
12 3 4 5
Detector Threshold
Hysteresis
A
Pch
OUT
Nch
GND
Step12345
B
t
PLH
Comparator
Pin Input Voltage
Comparator OutputHL
Tr. 1OF FO N
PchONOFF
Output Tr.
NchOFFON
IIIIIIIVV
Indefinite
Indefinite
Indefinite
Indefinite
RcRb
+
I.
II.
Rb
+
V
x
DD
RcRbRa
++
x V
DD
RbRa
LH
ONOFF
OFFON
ONOFF
10
Figure 2. Operation Diagram
DD
Step 1.The output voltage is equal to the supply voltage (V
DD
×
Step 2.At Point “A”, Vref≥V
(Rb+Rc)/(Ra+Rb+Rc) is true, as a result, the output of comparator is reverse,
).
and output voltage becomes to GND level. The voltage level of Point A means detector threshold volt-
age, or (-V
DET
).
Step 3.When the supply voltage is less than minimum operating voltage, the operation of output transistor be-
comes indefinite, and in the case that output is pulled up to V
DD
, the output voltage equals to VDD volt-
age.
Step 4.The output voltage equals to GND level.
DD
×
Step 5.At Point “B”, Vref≤V
equal to the supply voltage, or (V
Rb/(Ra+Rb) is true, Output of the comparator is reverse, and output voltage is
DD
). The voltage level of Point B means released voltage, or (+V
DET
).
* The difference between released voltage and detector threshold voltage is the detector threshold hysteresis.
TEST CIRCUITS
I
SS
R3111xxxxA/C
5.0V
V
DD
VDD
470k
IN
R3111
V
IN
Series
X
OUT
V
GND
R3111X
Series
OUT
GND
VOUT
Pull-up circuit is not necessary for
CMOS Output type, or R3111XXXXC.
Figure 3. Supply Current Test CircuitFigure 4. Detector Threshold Test Circuit
V
X
GND
DS
OUT
I
OUT
V
DD- VDS
V
V
DD
OUT
OUT
I
IN
V
V
DS
R3111
IN
V
X
Series
DD
R3111
Series
GND
*Apply to CMOS Output type only
Figure 5. Nch Driver Output Current Test
Figure 6. Pch Driver Output Current Test Circuit
Circuit
+VDET+2.0V
0.7V
VSS
P.G.
VDD
R3111XXXXA
Series
GND
OUT
OUT
R
470k
COUT
+5.0V
OUT
+V
DET
+2.0V
0.7V
V
SS
P.G.
R
100k
V
DD
C
IN
R3111
IN
Series
GND
XXXX
A
OUT
VSS
Figure 7. Output Delay Time Test Circuit (1)Figure 8. Output Delay Time Test Circuit (2)
OUT
R
470k
+5.0V
OUT
V
SS
11
R3111xxxxA/C
TYPICAL CHARACTERISTICS
1)Supply Current vs. Input Voltage
R3111x09xCR3111x27xC
2.5
2.0
2.0
(µA)
SS
1.5
1.0
0.5
Supply Current I
0.0
0246810
Input Voltage V
Topt=85°C
IN
(V)
25°C
-40°C
R3111x45xC
2.0
1.5
(µA)
SS
1.0
0.5
Supply Current I
Topt=85°C
-40°C
25°C
Topt=85°C
1.5
(µA)
SS
1.0
-40°C
0.5
Supply Current I
0.0
0246810
IN
Input Voltage V
(V)
25°C
0.0
0246810
IN
Input Voltage V
(V)
2)Detector Threshold Hysteresis vs. Temperature
R3111x09xCR3111x27xC
1.00
0.98
0.96
0.94
0.92
0.90
0.88
0.86
Detector Threshold -VDET(V)
0.84
-600 20406080-40 -20100
Temperature Topt(°C)
+VDET
-VDET
2.9
2.8
2.7
2.6
+VDET
-VDET
Detector Threshold -VDET(V)
2.5
-600 20406080-40 -20100
Temperature Topt(°C)
12
4.8
R3111xxxxA/C
R3111x45xC
4.7
+VDET
4.6
4.5
-VDET
Detector Threshold -VDET(V)
4.4
-600 20406080-40 -20100
Temperature Topt(°C)
3)Output Voltage vs. Input Voltage
R3111x09xAR3111x09xA
1.6
1.4
1.2
1.0
0.8
85°C
0.6
25°C
Output Voltage VOUT(V)
0.4
0.2
Topt=-40°C
0.0
00.6 0.811.21.40.2 0.41.6
Input Voltage V
V
DD Pull-up 470kΩ
IN(V)
6
5
Topt=-40°C
5V Pull-up 470kΩ
4
25°C
3
2
85°C
Output Voltage VOUT(V)
1
0
00.6 0.811.21.40.2 0.41.6
Input Voltage V
IN(V)
4.0
3.5
(V)
3.0
OUT
2.5
2.0
1.5
1.0
Output Voltage V
0.5
0.0
R3111x27xAR3111x27xA
VDD Pull-up 470kΩ
85°C
25°C
Topt=-40°C
01.522.533.50.514
IN
Input Voltage V
(V)
6
5
(V)
OUT
4
3
2
Output Voltage V
1
0
5V Pull-up 470kΩ
Topt=-40°C
25°C
85°C
01.522.533.50.514
Input Voltage V
IN
(V)
13
R3111xxxxA/C
R3111x45xAR3111x45xA
6
5
4
3
85°C
2
Output Voltage VOUT(V)
25°C
1
Topt=-40°C
0
0231654
Input Voltage V
4)Nch Driver Output Current vs. VDS
R3111x09xCR3111x09xC
700
VDD Pull-up 470kΩ
IN(V)
Topt=25°C
6
Topt=-40°C
5
25°C
4
85°C
3
2
Output Voltage VOUT(V)
1
0
0231654
Input Voltage V
300
5V Pull-up 470kΩ
IN(V)
Topt=25°C
600
DD=0.85V
V
500
400
300
Output Current IOUT(µA)
200
100
0.7V
0
00.20.40.60.8
V
DS(V)
R3111x27xCR3111x27xC
20
18
16
14
12
10
8
6
4
Output Current IOUT(mA)
2
0
00.511.522.5
V
1.5V
DS(V)
Topt=25°C
VDD=2.5V
2.0V
250
VDD=0.8V
200
150
Output Current IOUT(µA)
100
50
0.7V
0
00.020.040.060.080.1
V
DS(V)
300
250
VDD=0.8V
200
150
0.7V
Output Current IOUT(µA)
100
50
0
00.020.040.060.080.1
V
DS(V)
Topt=25°C
14
60
R3111x45xCR3111x45xC
Topt=25°C
300
R3111xxxxA/C
Topt=25°C
50
VDD=4.5V
40
3.5V
Output Current IOUT(mA)
30
20
10
2.0V
3.0V
2.5V
1.5V
0
00.511.522.5343.54.5
V
DS(V)
5)Nch Driver Output Current vs. Input Voltage
R3111x09xCR3111x27xC
900
800
700
(mA)
600
OUT
500
400
300
200
Output Current I
100
0
00.20.40.610.8
Input Voltage V
Topt=-85°C
25°C
IN
-40°C
(V)
4.0V
250
VDD=0.8V
200
150
0.7V
100
Output Current IOUT(µA)
50
0
00.020.040.060.080.1
V
DS(V)
14
12
(mA)
10
OUT
Topt=-40°C
8
6
4
Output Current I
2
0
00.511.512.53
IN
Input Voltage V
(V)
25°C
85°C
R3111x45xC
25
20
(mA)
OUT
15
10
5
Output Current I
0
0123456
Topt=-40°C
25°C
85°C
Input Voltage V
IN
(V)
15
R3111xxxxA/C
6)Pch Driver Output Current vs. Input Voltage
R3111x09xCR3111x27xC
1.4
Topt=25°C
3.5
Topt=25°C
1.2
VDS=0.7V
1.0
0.8
0.6
0.5V
0.4
Output Current IOUT(mA)
0.2
0.0
02468
Input Voltage V
IN(V)
R3111x45xC
IN
(V)
Topt=25°C
1.5V
1.0V
0.5V
4.5
4.0
(mA)
OUT
3.5
3.0
VDS=2.1V
2.5
2.0
1.5
1.0
Output Current I
0.5
0.0
0248610
Input Voltage V
3.0
2.5
VDS=2.1V
2.0
1.5V
1.5
1.0V
0.5V
Output Current IOUT(mA)
1.0
0.5
0.0
01243657
Input Voltage V
IN(V)
7)Output Delay Time vs. Load Capacitance
R3111x09xAR3111x27xA
100
10
1
tPLH
0.1
0.01
tPHL
Output Delay Time tP(ms)
0.001
0.00010.010.0010.1
Load Capacitance C
16
OUT
(µF)
100
10
1
tPLH
0.1
0.01
tPHL
Output Delay Time tP(ms)
0.001
0.00010.010.0010.1
Load Capacitance C
OUT
(µF)
R3111x45xA
100
10
t
1
PLH
0.1
t
0.01
PHL
Output Delay Time tP(ms)
0.001
0.00010.010.0010.1
OUT
Load Capacitance C
(µF)
8)Output Delay Time vs. Input Pin Capacitance
R3111x09xAR3111x27xA
100
R3111xxxxA/C
100
10
t
1
PLH
0.1
t
0.01
PHL
Output Delay Time tP(ms)
0.001
0.00010.010.0010.1
IN
Input Pin Capacitance C
(µF)
R3111x45xA
100
10
1
0.1
0.01
Output Delay Time tP(ms)
0.001
0.0010.10.011
t
PLH
t
PHL
Input Pin Capacitance C
IN
(µF)
10
1
t
PLH
0.1
t
PHL
0.01
Output Delay Time tP(ms)
0.001
0.00010.010.0010.1
Input Load Capacitance C
IN
(µF)
17
R3111xxxxA/C
TYPICAL APPLICATION
•R3111xxxxA CPU Reset Circuit (Nch Open Drain Output)
Case 1.Input Voltage to R3111xxxxA is equal to In-
put Voltage to CPU
V
DD
V
DD
R3111
SERIES
GND
XXXX
470k
A
OUT
R
V
RESET
GND
DD
CPU
Case 2.Input Voltage to R3111xxxxA is unequal to
Input Voltage to CPU
V
DD1
V
DD
R3111
SERIES
GND
XXXX
470k
A
OUT
R
V
RESET
GND
DD
CPU
V
DD2
• R3111xxxxA CPU Reset Circuit CMOS Output
V
DD
V
DD
R3111
SERIES
GND
XXXX
C
OUT
V
RESET
GND
DD
CPU
• R3111xxxxA Output Delay Time Circuit 1
(Nch Open Drain Output)
V
DD
V
DD
R3111
SERIES
GND
XXXX
470k
A
OUT
R
V
RESET
GND
DD
CPU
• Memory Back-up Circuit
V
DD
D1
D2
V
DD
A
B
G
GND
V
Y1
Y2
Y3
Y4
CC
• R3111xxxxA Output Delay Time Circuit 2
(Nch Open Drain Output)
R2R1
VCC
VDD
RESET
GND
CPU
XXXX
470k
A
OUT
VCC
100k
CC
V
R3111
SERIES
V
DD
GND
VCC
RAM1RAM2RAM3RAM4
GND CS
GND CS
GND CS
GND CS
DD
V
18
R3111
SERIES
GND
XXX
XC
OUT
• Voltage level Indicator Circuit (lighted when the power runs out)
(Nch Open Drain Output)
V
DD
V
DD
R3111
XXXX
A
SERIES
OUT
GND
• Detector Threshold Adjustable Circuit
(Nch Open Drain Output)
V
OUT
R3111
SERIES
GND
XXXX
DD
Ra
V
DD
A
+
C
Rb
Adjusted Detector Threshold
=(-V
DET)*(Ra+Rb)/Rb
Hysteresis Voltage
=(V
HYS)*(Ra+Rb)/Rb
R3111xxxxA/C
• Window Comparator Circuit
(Nch Open Drain Output)
V
DD
R3111
V
DD
R3111
SERIES
GND
XXXX
OUT
A
V
DET
1
SERIES
GND
XXXX
*) If the value of Ra is set excessively large, voltage drop may
occur caused by the supply current of IC itself, and detector
threshold may vary.
V
DD
OUT
A
V
DET
OUT
2
V
DD
V
SS
DET
1
V
V
DET
2
OUT
V
SS
19
R3111xxxxA/C
• Over-charge Preventing Circuit
Light
R1
Solar Battery
R2
D1
R3
OUT
VDD
R3111
SERIES
GND
R4
XXXXC
TECHNICAL NOTES
V
V
DD
V
DD
R3111
SERIES
GND
R
OUT
DD
V
DD
R3111
SERIES
GND
Figure 9Figure 10
Load
R1
R2
OUT
1.In Figure 9, When R3111xxxxC is used, and if an impedance is connected between Voltage Supplier and the V
Pin of R3111xxxxC Series, the operation might be unstable by cross conduction current at detection.
When R3111xxxxA is used in Figure 9, if the value of R is set excessively large, voltage drop may occur caused
by supply crrent of IC itself and Detector threshold may vary.
2.Wiring as shown in Figure 10 may cause the oscillation in both output types of R3111 Series.
DD
20
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.