The ISL6298 is an integrated single-cell Li-ion or Li-polymer
battery charger optimized for low current applications. The
targeted applications include mini-disk (MD) players, Blue
Tooth headsets, or other applications that use low-capacity
battery cells.
The ISL6298 is a linear charger that charges the battery in a
CC/CV (constant current/constant voltage) profile. The
charge current is programmable with an external resistor up
to 450mA during the CC phase. Once the battery voltage
reaches 4.2V (or 4.1V), the charger enters CV mode and the
charge current starts to reduce. When the charger current
drops to a user-programmable threshold, the charger
indicates the end-of-charge with a STATUS pin. The charger
does not actually terminate until a user-programmable total
fast charge time is reached. If the battery voltage drops to a
recharge threshold after termination, the charger will recharge the battery to its full capacity. The charger
preconditions the battery with 20% of the programmed CC
current if the battery voltage is below 2.8V. The total
precharge time is limited to 1/8 of the total fast charge time.
The ISL6298 features charge current thermal foldback to
guarantee safe operation when the printed circuit board is
space-limited for thermal dissipation. Additional features
include an NTC thermistor interface for monitoring the
ambient temperature, the ability to disable the time limit of
the fast charge, an FAULT indication, and a thermally
enhanced QFN or DFN package.
Ordering Information
TEMP.
PART # (NOTE)
ISL6298CR4Z-20 to 7016 Ld 4x4 QFNL16.4x4
ISL6298CR4Z-T16 Ld 4x4 QFN Tape and Reel
ISL6298-2CR3Z-20 to 7010 Ld 3x3 DFNL10.3x3
ISL6298-2CR3Z-T10 Ld 3x3 DFN Tape and Reel
ISL6298-2CR4Z-20 to 7016 Ld 4x4 QFNL16.4x4
ISL6298-2CR4Z-T16 Ld 4x4 QFN Tape and Reel
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
Add a “Z” to the end of the part # above for Pb-free packages, for
example, “ISL6298-2CR3Z-T” is the part # for the Pb-free
ISL6298-2CR3-T Tape and Reel package.
RANGE (°C)PACKAGE
PKG.
DWG. #
FN9173
Features
• Complete Charger for Single-Cell Li-ion Batteries
• Integrated Pass Element and Current Sensor
• No External Blocking Diode Required
• 1% Voltage Accuracy
• Programmable Current Limit up to 450mA
• Programmable End-of-Charge Current
• Preconditioning with 20% Fast Charge Current
• 10% Accuracy at 250mA
• Charge Current Thermal Foldback
• NTC Thermistor Interface for Battery Temperature Monitor
• User Programmable Safety Timer
• Ambient Temperature Range: -20°C to 70°C
• Thermally-Enhanced QFN Packages
• Pb-Free Available ("Z" suffix)
Applications
• MD Players, Blue-Tooth Headsets and MP3 Players
• Portable Instruments
• PDAs, Cell Phones and Smart Phones
• Stand-Alone Chargers
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief TB379 “Thermal Characterization of
Packaged Semiconductor Devices”
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”
Pinouts
ISL6298 (16 LEAD QFN)
TOP VIEW
VIN
VIN
1614 13
15
1
VIN
2
FAULT
STATUS
TIME
3
4
GND
6578
TOEN
VBAT
EN
VBAT
V2P8
12
VBAT
TEMP
11
10
IMIN
IREF
9
ISL6298 (10 LEAD DFN)
TOP VIEW
1
VIN
TIME
GND
2
3
4
5
FAULT
STATUS
VBAT
10
TEMP
9
IREF
8
V2P8
7
EN
6
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
1. θ
JA
Tech Brief TB379.
2. θ
, “case temperature” location is at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
JC
Electrical SpecificationsTypical values are tested at VIN = 5V and 25°C Ambient Temperature, maximum and minimum values are
guaranteed over 0°C to 70°C Ambient Temperature with a supply voltage in the range of 4.3V to 6.5V, unless
otherwise noted.
Thermal Resistance (Notes 1, 2)θ
(°C/W) θJC (°C/W)
JA
4x4 QFN Package . . . . . . . . . . . . . .414
3x3 DFN Package . . . . . . . . . . . . . .464
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNITS
POWER-ON RESET
Rising VIN Threshold3.03.44.0V
Falling VIN Threshold (Note 3)2.252.42.65V
STANDBY CURRENT
VBAT Pin Sink CurrentI
STANDBY
VIN Pin Supply CurrentI
VIN Pin Supply CurrentI
VIN
VIN
VIN floating or EN = LOW--3.0µA
VBAT floating and EN pulled low-30-µA
VBAT floating and EN floating-1-mA
VOLTAGE REGULATION
Output VoltageV
Output VoltageV
CH
CH
Power MOSFET On ResistanceVBAT = 3.7V, I
For ISL6298 only4.0594.104.141V
For ISL6298-2 only4.1584.204.242V
CHARGE
= 0.3A, -0.5-Ω
CHARGE CURRENT
Constant Charge Current I
Trickle Charge CurrentI
Constant Charge Current I
Trickle Charge CurrentI
Constant Charge Current I
Constant Charge Current I
Trickle Charge CurrentI
End-of-Charge ThresholdI
CHARGERIREF
TRICKLE
CHARGEVIREF
TRICKLE
CHARGEVIREF
CHARGEVIREF
TRICKLE
EOC
R
V
V
R
IREF
IREF
IREF
IMIN
= 80kΩ, V
= 80kΩ, V
> 1.2V, V
> 1.2V, V
< 0.4V, V
< 0.4V, V
< 0.4V, V
= 80kΩ-25-mA
= 3.7V225250275mA
BAT
= 2.0V-55-mA
BAT
= 3.7V-255-mA
BAT
= 2.0V-52-mA
BAT
= 3.7V, TA = 25°C75100125mA
BAT
= 3.7V, 0°C ~ 50°C70100130mA
BAT
= 2.0V-23-mA
BAT
RECHARGE THRESHOLD
Recharge Voltage ThresholdV
Recharge Voltage ThresholdV
RECHRG
RECHRG
For ISL6298 only-3.9-V
For ISL6298-2 only-4.0-V
2
ISL6298
Electrical SpecificationsTypical values are tested at VIN = 5V and 25°C Ambient Temperature, maximum and minimum values are
guaranteed over 0°C to 70°C Ambient Temperature with a supply voltage in the range of 4.3V to 6.5V, unless
otherwise noted. (Continued)
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNITS
TRICKLE CHARGE THRESHOLD
Trickle Charge Threshold VoltageV
Trickle Charge Threshold VoltageV
MIN
MIN
TEMPERATURE MONITORING
Low Battery Temperature ThresholdV
TMIN
Low Battery Temperature HysteresisV2P8 = 3.0V-220-mV
High Battery Temperature Threshold V
TMAX
High Battery Temperature HysteresisV2P8 = 3.0V-60-mV
Battery Removal ThresholdV
Charge Current Foldback ThresholdT
Current Foldback Gain (Note 4)G
RMV
FOLD
FOLD
OSCILLATOR
Oscillation PeriodT
OSC
LOGIC INPUT AND OUTPUT
TOEN Input High2.0--V
TOEN and EN Input Low--0.8V
IREF and IMIN Input High1.2--V
IREF and IMIN Input Low--0.4V
STATUS/FAULT Sink CurrentPin Voltage = 0.8V5--mA
NOTES:
3. The POR falling edge voltage is guaranteed to be lower than the Trickle Charge Threshold Voltage (V
4. Guaranteed by design, not tested.
For ISL6298 only2.632.732.93V
For ISL6298-2 only2.72.83.0V
V2P8 = 3.0V1.451.511.57V
V2P8 = 3.0V0.360.380.40V
V2P8 = 3.0V-2.25-V
85100115°C
-25-mA/°C
C
= 15nF2.43.03.6ms
TIME
) by actual tests.
MIN
3
ISL6298
Typical Operating Performance The test conditions for the Typical Operating Performance are: V
R
= R
IREF
4.25
4.24
4.23
4.22
4.21
4.20
4.19
4.18
4.17
BATTERY VOLTAGE (V)
4.16
4.15
0 0.05 0.1 0. 15 0.2 0. 25 0.3 0.35 0.4
CHARGE CURRENT (A)
FIGURE 1. CHARGER OUTPUT VOLTAGE vs CHARGE
CURRENT
4.30
4.28
4.26
4.24
4.22
4.20
4.18
4.16
4.14
BATTERY VOLTAGE (V)
4.12
4.10
CHARGE CURRENT = 10mA
4.3 4.5 4.7 4.9 5.1 5.3 5.5 5.7 5.9 6. 1 6.3 6.5
INPUT VOLTAGE (V)
FIGURE 3. CHARGER OUTPUT VOLTAGE vs INPUT
VOLTAGE CHARGE CURRENT IS 50mA
IMIN
= 80kΩ, V
= 3.7V, Unless Otherwise Noted
BAT
4.216
4.214
4.212
4.210
4.208
4.206
4.204
OUTPUT VOLTAGE (V)
4.202
4.200
020406080100
LOAD CURRENT = 10mA
TEMPERATURE (OC)
FIGURE 2. CHARGER OUTPUT VOLTAGE vs TEMPERATURE
450
400
350
300
250
200
150
100
CHARGE CURRENT (mA)
50
0
00.511.522.533.544.5
R
V
IREF
IREF
= 50kΩ
= 0 V
BATTERY VOLTAGE (V)
FIGURE 4. CHARGE CURRENT vs BATTERY VOLTAGE
= 5V, TA = 25°C,
IN
500
450
400
350
300
250
200
150
100
CHARGE CURRENT (mA)
50
0
020406080100
R
R
IREF
IREF
V
= 50kΩ
= 100kΩ
IREF
= 0 V
TEMPERATURE (OC)
0.45
0.40
0.35
0.30
0.25
0.20
0.15
CHARGE CURRENT (A)
0.10
0.05
0.00
4.3 4.5 4.7 4.9 5.1 5.3 5. 5 5.7 5.9 6.1 6.3 6.5
R
INPUT VOLTAGE (V)
IREF
V
IREF
= 50kΩ
= 0 V
FIGURE 5. CHARGE CURRENT vs AMBIENT TEMPERATUREFIGURE 6. CHARGE CURRENT vs INPUT VOLTAGE
4
ISL6298
Typical Operating Performance The test conditions for the Typical Operating Performance are: V
R
= R
IREF
2.920
2.915
2.910
2.905
V2P8 PIN VOLTAGE (V)
LOAD CURRENT = 2 mA
2.900
3.544.555.566.5
INPUT VOLTAGE (V)
FIGURE 7. V2P8 OUTPUT vs INPUT VOLTAGEFIGURE 8. V2P8 OUTPUT vs ITS LOAD CURRENT
1000
900
800
700
600
500
MOSFET ON RESISTANCE (mΩ)
400
FIGURE 9. r
MEASURED WITH THE 3X3
DFN PACKAGE
0 20406080100120
TEMPERATURE (OC)
vs TEMPERATURE AT 3.7V OUTPUTFIGURE 10. r
DS(ON)
IMIN
= 80kΩ, V
= 3.7V, Unless Otherwise Noted (Continued)
BAT
3.00
2.95
2.90
2.85
2.80
V2P8 PIN VOLTAGE (V)
2.75
2.70
02 46 810
LOAD CURRENT (mA)
770
R
= 50kΩ
730
690
650
610
570
530
490
MOSFET ON RESISTANCE (mΩ)
450
3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3. 9 4.0 4.1
IREF
MEASURED AT 250mA
4X4 PACKAGE
BATTERY VOLTAGE (V)
vs OUTPUT VOLTAGE USING CURRENT
DS(ON)
LIMITED ADAPTERS
= 5V, TA = 25°C,
IN
3X3 PACKAGE
1.2
1.0
0.8
50
45
40
35
30
0.6
25
20
0.4
REVERSE CURRENT (µA)
0.2
15
10
5
INPUT QUIESCENT CURRENT (µA)
0.0
0 20406080100
TEMPERATURE (OC)
0
FIGURE 11. REVERSE CURRENT vs TEMPERATUREFIGURE 12.
5
EN PIN GROUNDED
020406080100
TEMPERATURE (OC)
INPUT QUIESCENT CURRENT vs TEMPERATURE
ISL6298
Typical Operating Performance The test conditions for the Typical Operating Performance are: V
R
IREF
50
45
40
35
30
25
20
15
10
5
INPUT QUIESCENT CURRENT (µA)
0
3.03.54.04.55.05. 56.06.5
INPUT VOLTAGE (V)
FIGURE 13. INPUT QUIESCENT CURRENT vs INPUT
VOLTAGE WHEN SHUTDOWN
28
= R
IMIN
= 80kΩ, V
= 3.7V, Unless Otherwise Noted (Continued)
BAT
1.10
1.05
1.00
0.95
0.90
0.85
INPUT QUIESCENT CURRENT (mA)
0.80
4.2 4.54.8 5.1 5.4 5. 7 6.0 6.3 6. 6
INPUT VOLTAGE (V)
FIGURE 14. INPUT QUIESCENT CURRENT vs INPUT
VOLTAGE WHEN NOT SHUTDOWN
= 5V, TA = 25°C,
IN
24
20
16
12
CURRENT (mA)
8
4
0
0.00.51.01.52.02.53.03.54.04.55.0
PIN VOLTAGE (V)
FIGURE 15. STATUS/FAULT PIN VOLTAGE vs CURRENT WHEN THE OPEN-DRAIN MOSFET TURNS ON
6
ISL6298
Pin Description
VIN (Pin 1, 15, 16 for 4x4; Pin 1 for 3x3)
VIN is the input power source. Connect to a wall adapter.
Fault (Pin 2)
FAULT is an open-drain output indicating fault status. This
pin is pulled to LOW under any fault conditions.
Status (Pin 3)
STATUS is an open-drain output indicating charging and
inhibit states. The STATUS pin is pulled LOW when the
charger is charging a battery.
Time (Pin 4)
The TIME pin determines the oscillation period by
connecting a timing capacitor between this pin and GND.
The oscillator also provides a time reference for the charger.
GND (Pin 5)
GND is the connection to system ground.
TOEN (Pin 6 for 4x4; N/A for 3x3)
TOEN is the TIMEOUT enable input pin. Pulling this pin to
LOW disables the TIMEOUT function. Leaving this pin HIGH
or floating enables the TIMEOUT limit. For the 3x3 DFN
package, this pin is left floating internally.
EN (Pin 7 for 4x4; Pin 6 for 3x3)
EN is the enable logic input. Connect the EN pin to LOW to
disable the charger or leave it floating to enable the charger.
V2P8 (Pin 8 for 4x4; Pin 7 for 3x3)
This is a 2.8V reference voltage output. This pin outputs a
2.8V voltage source when the input voltage is above POR
threshold and outputs zero otherwise. The V2P8 pin can be
used as an indication for adapter presence.
IREF (Pin 9 for 4x4; Pin 8 for 3x3)
This is the programming input for the constant charging
current.
IMIN (Pin 10 for 4x4; N/A for 3x3)
IMIN is the programmable input for the end-of-charge
current. For the 3x3 DFN package, this pin is shorted to the
V2P8 pin internally.
TEMP (Pin 11 for 4x4; Pin 9 for 3x3)
TEMP is the input for an external NTC thermistor. The TEMP
pin is also used for battery removal detection.
VBAT (Pin 12, 13, 14 for 4x4; Pin 10 for 3x3)
VBAT is the connection to the battery. Typically a 10µF
Tantalum capacitor is needed for stability when there is no
battery attached. When a battery is attached, only a 1µF
ceramic capacitor is required.
Typical Applications
4x4 QFN Package Options
5V Wall
Adapter
FIGURE 16. TYPICAL APPLICATION CIRCUIT FOR THE 4x4 QFN PACKAGE OPTIONS
ISL6298
TEMP
GND
VBAT
IREF
IMIN
1 F
µ
V2P8
C
2
R
U
R
T
R
IMIN
Ωk80
R
IREF
Ωk80
Battery
Pack
T
VIN
Fµ1
C
500 Ω
1
R
D
500 Ω
R
1
1
2
D
2
Fµ1
C
3
TOEN
FAULT
STATUS
EN
V2P8
TIME
C
TIME
nF15
7
Typical Applications (Continued)
3x3 DFN Package Option
ISL6298
5V Wall
Adapter
FIGURE 17. TYPICAL APPLICATION CIRCUIT FOR THE 3x3 DFN PACKAGE OPTION
3x3 DFN Package Option
5V Wall
Adapter
VIN
Fµ1
C
500 Ω
1
R
D
1
500 Ω
R
1
2
D
2
FAULT
STATUS
EN
TIME
C
TIME
ISL6298
(3X3 DFN)
TEMP
GND
VBAT
V2P8
IREF
1 F
C
R
µ
2
IREF
Battery
Pack
T
R
T
R
U
Fµ1
C
3
Ωk80
nF15
ISL6298
(3X3 DFN)
VBAT
1 F
µ
C
2
Battery
Pack
VIN
Fµ1
C
1
V2P8
C
Fµ1
3
To µC
10kΩ
R
1
10kΩ
R
2
EN
FAULT
STATUS
TIME
C
TIME
TEMP
IREF
GND
R
IREF
Ωk80
nF15
FIGURE 18. TYPICAL APPLICATION CIRCUIT FOR NOT USING AN NTC THERMISTOR AND INTERFACING TO A MICRO-COMPUTER.
THE TEMP PIN IS SHORT-CIRCUITED TO IREF PIN. THE INDICATIONS USES V2P8 PIN OUTPUT AS THE PULL-UP
VO LTAGE .
8
Block Diagram
C
1
ISL6298
Q
VINVBAT
Temperature
Monitoring
Q
SEN
25000:1
Current
I
T
IREF
R
IREF
IMIN
R
IMIN
I
R
Current
References
I
MIN
I
SEN
Mirror
+
CA
-
Trickle/Fast
I
SEN
+
-
MIN_I
V2P8
Under Temp
TEMP
NTC
Interface
Over Temp
Batt Removal
TOEN
TIME
OSC
GND
MAIN
Input_OK
CHRG
LOGIC
COUNTER
References
CH
POR
V
V
+
VA
-
Minbat
Recharge
STATUS
MIN
V
V
+
-
V
+
-
V
FAULT
Input_OK
RECHRG
VIN VBAT
POR
+
100mV
CH
+
-
V
+
-
ESD
Diodes
V
MIN
RECHRG
VIN
VIN
V2P8
STATUS
FAULT
EN
NOTE: For the 3x3 DFN package, the TOEN pin is left floating and the IMIN pin is connected to the V2P8 pin internally.
FIGURE 19. BLOCK PROGRAM
9
ISL6298
Theory of Operation
The ISL6298 is an integrated charger optimized for lowcapacity single-cell Li-ion or Li-polymer batteries. It charges
a battery with the constant current (CC) and constant voltage
(CV) profile. The charge current is trimmed to have better
than 10% accuracy at 250mA and is programmable up to
450mA. The charge voltage has 1% accuracy.
Figure 20 shows the typical operating waveforms after
power on. The power is applied at t
reaches the power-on reset (POR) threshold at t
pin starts to output a 2.8V supply. This supply also powers
the internal control circuit. The POR initiates a charge cycle.
Six different ways can initiate a charge cycle, as listed in
Table 1.
TABLE 1. EVENTS THAT LEADS TO A NEW CHARGE CYCLE
#EVENT
1Power on Reset
2The VIN pin voltage drops below the VBAT pin voltage and
then rises back above the VBAT pin voltage
3A new battery being inserted (detected by TEMP pin)
4The battery voltage drops below a recharge threshold after
completing a charge cycle
5recovery from a battery over-temperature fault
6the EN pin is toggled from GND to floating
A charge cycle goes through a trickle mode (t
constant current (CC) mode (t
(CV) mode (t
(t
to t5) is programmed by users to prevent charging a faulty
2
to t5). The total fast charge (CC and CV) time
3
battery for an excessively long time. At the end of the fast
charge time (t
), the charger is terminated. The charger
5
must reach an end-of-charge (EOC) condition before the
termination; otherwise, the charger issues a fault indication
through the FAULT pin. The charger issues a logic low signal
. When the input voltage
0
to t3) and a constant voltage
2
, the V2P8
1
to t2), a
1
at the STATUS pin at the beginning of a charge cycle. When
the EOC condition is reached, the STATUS rises to high, as
shown at t
.
4
After termination, if the battery voltage drops below a
recharge threshold (t
in Figure 20), a re-charge cycle will
6
take place. The total time for the recharge cycle is the total
fast charge time (t
to t8). The trickle charge time is
7
negligible in a recharge cycle. More detailed description for
the operation is given below.
Power on Reset (POR)
The ISL6298 resets itself as the input voltage rises above
the POR rising threshold. The V2P8 pin outputs a 2.8V
voltage, the internal oscillator starts to oscillate, the internal
timer is reset, and the charger begins to charge the battery.
The two indication pins, STATUS and FAULT, indicate a
LOW and a HIGH logic signal respectively. Figure 20
illustrates the startup of the charger between t
to t2.
0
The ISL6298 has a typical rising POR threshold of 3.4V and
a falling POR threshold of 2.4V. The 2.4V falling threshold
guarantees charger operation with a current-limited adapter
to minimize the thermal dissipation. See more details on
using a current-limited adapter in the ISL6292 datasheet,
available at http://www.intersil.com.
Internal Oscillator
The internal oscillator (see the Block Diagram) establishes a
timing reference. The oscillation period is programmable
with an external timing capacitor, C
, as shown in Typical
TIME
Applications. The oscillator charges the timing capacitor to
1.5V and then discharges it to 0.5V in one period, both with
10µA current. The period T
T
OSC
0.2 106C
⋅⋅=ondssec()
TIME
OSC
is:
(EQ. 1)
A 1nF capacitor results in a 0.2ms oscillation period.
Total Fast Charge Time
VIN
POR Threshold
V2P8
STATUS
FAULT
VBAT
I
CHARGE
t0t1t
FIGURE 20. TYPICAL OPERATING WAVEFORMS
Charge Cycle
15 Cycles to
1/8 TIMEOUT
2.8V V
t3t4t
2
MIN
V
RECHRG
I
MIN
5t6t7
10
Charge Cycle
15 Cycles
The total fast charge time TIMEOUT is also programmed by
the C
. A 22-stage binary counter increments each
TIME
oscillation period to set the TIMEOUT, thus,
TIMEOUT2
22
T
OSC
C
TIME
----------------- -
14
⋅=⋅=minutes()
1nF
(EQ. 2)
A 1nF capacitor leads to 14 minutes of TIMEOUT. If a user
needs to set the TIMEOUT to 3.5 hours, a 15nF capacitor is
required. The charger must reach EOC before the charger
terminates, otherwise, a TIMEOUT fault will be issued.
Trickle Charge Time
The trickle charge time is limited to 1/8 of TIMEOUT. If the
trickle charge time (t
fault will be issued. The end of trickle charger is determined
t
8
by the battery voltage staying above the trickle charge
threshold (given in the Electrical Specification) for 15
consecutive cycles of T
to t2) exceeds the limit, a TIMEOUT
1
; therefore, the minimum time
OSC
ISL6298
the charger stays in the trickle mode is 15 cycles. Usually for
a recharge cycle, the trickle charge time is 15 cycles (t
to t7
6
in Figure 20). If the battery voltage falls below the trickle
charge threshold during the 15 cycles, the 15-cycle counter
is reset (not the total-trickle-charge-time counter) and the
charger remains in the trickle mode.
Disabling TIMEOUT Limit
The TOEN pin allows the user to disable the fast charge
TIMEOUT limit by pulling the TOEN pin to LOW or shorting it
to GND. When this happens, the charger never terminates.
The STATUS pin still issues the EOC indication when the
EOC condition is reached. The EOC indication is latched
and does not change until a new charge cycle starts,
initiated by the events listed in Table 1. Leaving the TOEN
pin floating is recommended to enable the TIMEOUT. Driving
the TOEN pin above 3.0V is not recommended. The trickle
charge time limit can never be disabled. For the 3x3 DFN
package option, the TOEN pin is left floating internally and,
therefore, the TIMEOUT cannot be disabled.
CC Mode Current Programming
The charge current is programmed by the IREF pin. There
are three ways to program the charge current:
1. driving the IREF pin above 1.3V
2. driving the IREF pin below 0.4V,
3. or using the R
as shown in the Typical Applications.
IREF
The voltage of IREF is regulated to a 0.8V reference voltage
when not driven by any external source. The charging
current during the CC mode is 25,000 times that of the
current in the R
resistor. Hence, depending on how the
IREF
IREF pin is used, the charge current is,
IREF
IREF
IREF
1.3V>
(EQ. 3)
0.4V<
I
CHARGE
255m A
0.8V
-----------------
=
R
25000×A()
IREF
100m A
V
R
V
The internal reference voltage at the IREF pin is capable of
sourcing less than 100µA current. When pulling down the
IREF pin with a logic circuit, the logic circuit needs to be able
to sink at least 100µA current.
The actual charge current may be affected by the thermal
foldback function. See the Thermal Foldback section for
more details.
Trickle Mode Current
The charge current in the trickle mode is 20% of the
programmed CC mode charge current, that is:
0.2 I
I
TRICKLE
where I
CHARGE
⋅=
CHARGE
is the charge current given in EQ. 3.
(EQ. 4)
End-of-Charge (EOC) Current
The EOC current I
starts to indicate the end of the charge with the STATUS pin,
as shown in Figure 20. The I
1. By connecting a resistor between the IMIN pin and
ground,
2. Or by connecting the IMIN pin to the V2P8 pin.
When programming with the resistor, the I
equation below:
V
----------------
EOC
2500
R
is the resistor connected between the IMIN pin
IMIN
I
where R
and the ground, as shown in the Typical Application Circuit.
When connected to the V2P8 pin, the I
I
CHARGE
given in EQ. 3, except when the IREF pin is
shorted to GND. Under this exception, I
ISL6298 in the 3x3 DFN package, the IMIN pin is connected
internally to the V2P8 pin.
sets the level at which the charger
EOC
is set in two ways:
EOC
EOC
2500
0.8V
----------------
R
IMIN
A()⋅=⋅=
EOC
EOC
REF
IMIN
is set in the
(EQ. 5)
is set to 1/10 of
is 5mA. For the
EOC Conditions
The EOC indication is asserted when the following
conditions are satisfied simultaneously:
1. The battery voltage is above the recharge threshold, and
2. The charge current is lower than the EOC current.
The two conditions can prevent prematurely indicating EOC
due to thermal foldback or other transient events.
Recharge
After a charge cycle is completed, charging is prohibited until
the battery voltage drops to a recharge threshold, V
RECHRG
(see Electrical Specifications). Then a new charge cycle
starts at point t
The safety timer is reset at t
and ends at point t8, as shown in Figure 20.
6
.
6
2.8V Voltage Regulator
The V2P8 pin is the output of an internal 2.8V linear regulator.
The 2.8V is the voltage supply for the internal control circuit
and can also be used by external circuits, such as the NTC
thermistor circuit. The external load is not recommended to
exceed 2mA. The V2P8 pin is recommended to be decoupled
with a 1µF ceramic capacitor.
NTC Thermistor Interface
The TEMP pin offers an interface to an external NTC
thermistor. This pin has two functions: to monitor the battery
ambient temperature or to monitor the insertion of the battery.
The ISL6298 assumes that the NTC thermistor is inside the
battery pack. The battery and the NTC thermistor are inserted
or removed together. Removing the NTC thermistor disables
the charger.
Figure 21 shows the implementation of the TEMP pin. The
comparator CP1 monitors the existence of the NTC thermistor.
When the thermistor is removed, the TEMP pin voltage is
11
ISL6298
pulled up to the V2P8 pin voltage, higher than the Battery
Removal Threshold V
, and the charger is disabled.
RMV
Comparators CP2 and CP3 form a window comparator and
the two transistors, Q1 and Q2, create hysteresis for the two
window thresholds respectively. When the TEMP pin voltage
is “out of the window,” determined by the V
TMIN
and V
TMAX
the ISL6298 stops charging and indicates a fault condition.
When the temperature returns to within the window, the
charger re-starts a charge cycle. See the Application
Information for more details on the NTC thermistor selection.
Thermal Foldback
Over-heating is always a concern in a linear charger. The
maximum power dissipation usually occurs at the beginning
of a charge cycle when the battery voltage is at its minimum
Battery
Removal
Under
Temp
Over
Temp
ISL6298
CP1
-
+
CP2
-
+
CP3
-
+
V
V
TMAX
RMV
V
TMIN
2.8V
To TEMP Pin
Q1
Q2
R1
40K
R3
75K
R4
25K
R5
4K
R2
60K
V2P8
TEMP
GND
R
U
R
T
but the charge current is at its maximum. The charge current
thermal foldback function in the ISL6298 frees users from
the over-heating concern.
Figure 22 shows the typical charge curves in a charge cycle,
using a constant voltage input. Once the internal
,
temperature reaches 100°C, the ISL6298 starts to reduce
the charge current to prevent further temperature rise. The
power dissipation is directly related to the thermal
impedance, which is related to the layout of the printedcircuit board, and the ambient temperature. The dotted lines
show the power limit and the current waveforms in two cases
that the thermal foldback occurs. The current is reduced and
gradually increases to the constant charge current as the
battery voltage rises.
Usually the charge current should not drop below the EOC
current because of the thermal foldback. For some extreme
cases if that does happen, the charger does not indicate
end-of-charge unless the battery voltage is already above
the recharge threshold.
Indications
The ISL6298 has three indications: the input presence, the
charge status, and the fault indication. The input presence is
indicated by the V2P8 pin while the other two indications are
presented by the STATUS pin and FAULT pin respectively.
Figure 23 shows the V2P8 pin voltage vs. the input voltage.
The V2P8 pin outputs a 2.8V voltage (blue waveform) when
the input voltage (yellow waveform) rises above 3.4V rising
POR threshold and falls to zero volt when the input voltage
falls below the 2.4V falling POR threshold. The V2P8 pin can
be used as a logic signal for the input presence.
FIGURE 21. THE INTERNAL AND EXTERNAL CIRCUIT FOR
THE NTC INTERFACE
Trickle
V
IN
V
CH
V
MIN
I
REF
I
/5
REF
P
1
P
2
P
3
Constant Current
Mode
Input Voltage
Mode
Constant Voltage
TIMEOUT
Mode
Inhibit
Battery Voltage
Charge Current
Power Dissipation
FIGURE 22. TYPICAL CHARGE CURVES USING A
CONSTANT-VOLTAGE INPUT
12
3.4V
2.4V
2.8V
V
IN
V2P8
FIGURE 23. THE V2P8 PIN OUTPUT vs THE INPUT VOLTAGE
AT THE VIN PIN. VERTICAL: 1V/DIV,
HORIZONTAL: 100ms/DIV
ISL6298
Three types of events will result in the FAULT pin to indicate
a logic low signal. The following explains the causes and
consequences.
1. TEMP pin voltage out of window. This is caused by the
ambient temperature being out of the user-set window.
When this fault occurs, the charging is halted until the
temperature returns within the window.
2. TEMP pin voltage higher than the battery removal
threshold. This is caused by the removal of the battery
pack. The charger is disabled when the battery is
removed and enabled when the battery is re-inserted.
3. TIMEOUT fault during trickle mode or CC mode. The
charger is latched when this error occurs. This fault can
only be cleared by cycling the input power or the EN
input.
The STATUS pin indicates a logic low when a charge cycle
starts and indicates a high when the EOC conditions are
met. Once the EOC conditions are met, the STATUS signal
is latched to high until a new charge cycle.
Both the STATUS and the FAULT pin need be pulled up with
external resistors to the 2.8V from the V2P8 pin or the input
voltage. Table 2 summarizes the STATUS and FAULT pins.
TABLE 2. INDICATION PINS
FAULT STATUSINDICATION
HighHighCharge completed with no fault (Inhibit) or
Standby
HighLowCharging in one of the three modes
LowHighFault
*Both outputs are pulled up with external resistors.
Shutdown
The ISL6298 can be shutdown by pulling the EN pin to
ground. When shut down, the charger draws typically less
than 30µA current from the input power and less than 3µA
current from the battery. The 2.8V output at the V2P8 pin is
also turned off. The EN pin needs be driven with an opendrain or open-collector logic output, so that the EN pin is
floating when the charger is enabled.
Battery Leakage Current
The leakage current from the battery is different when the IC
is enabled and disabled. When the IC is disabled, due to
removing input power or pulling the EN pin to low, the
leakage current is less than 3µA. When the IC is enabled but
not charging (due to a fault condition, the battery removal, or
after termination), the leakage current is caused mainly by
an internal 75kΩ voltage divider for the output voltage feedback. The leakage current is approximately 56µA when the
battery voltage is 4.2V.
Applications Information
Capacitor Selection
Typically any type of capacitors can be used for the input
and the output. A minimum 1µF ceramic capacitor is
recommended to be placed very close to the charger input.
Higher value input decoupling capacitance helps the stable
operation of the charger.
The output capacitor selection is dependent on the
availability of the battery during operation. When the battery
is attached to the charger, the output capacitor can be any
ceramic type with the value higher than 1µF. However, if
there is a chance the charger will be used as a linear
regulator, a 10µF tantalum capacitor is recommended.
The V2P8 pin supplies power to the internal control circuit as
well as external circuits. A good decoupling to this pin is very
important to a reliable operation of the charger. It is
recommended to use a 1µF ceramic capacitor for this pin.
FAULT and STATUS Pull-Up Resistors
Both FAULT and STATUS pins are open-drain outputs that
need an external pull-up resistor. It is recommended that
both pins be pulled up to the input voltage or the 2.8V from
the V2P8 pin, as shown in the Typical Application Circuits. If
the indication pins have to be pulled up to other voltages, the
user needs to examine carefully whether or not the ESD
diodes will form a leakage current path to the battery when
the input power is removed. If the leakage path does exist,
an external transistor is required to break the path.
Figure 24 shows the implementation. If the FAULT pin is
directly pulled up to the VCC voltage (not shown in Figure
24), a current will flow from the VCC to the FAULT pin, then
through the ESD diode to the VIN pin. Any leakage on the
VIN pin, caused by an external or internal current path, will
result in a current path from VCC to ground.
VIN
ESD Diode
R
EN
GND
FIGURE 24. PULL-UP CIRCUIT TO AVOID BATTERY LEAKAGE
LKG
Control
Note:
is approximately 240kΩ when EN is floating and is
R
LKG
approximately 140kΩ when the EN is grounded.
CURRENT IN THE ESD DIODES.
STATUS
VIN
FAULT
VCC
VIN or
V2P8
R
Q
1
1
13
ISL6298
The N-channel MOSFET Q1 buffers the FAULT pin. The
gate of Q
FAULT pin outputs a logic low signal, Q
is connected to VIN or the V2P8 pin. When the
1
is turned on and its
1
drain outputs a low signal as well. When FAULT is high
impedance, R
power is removed, the Q
the Q
drain stays high.
1
pulls the Q1 drain to high. When the input
1
gate voltage is also removed, thus
1
NTC Thermistor Circuit Design
As shown in Figure 21, the thresholds for the NTC circuit are
formed by the internal voltage divider. Since the external
circuit is also a voltage divider, the accuracy of the bias
voltage, that is, the V2P8 pin voltage, becomes not critical.
Figure 25 shows the typical values of the thresholds as
percentages of the V2P8 pin voltage.
The NTC thermistor resistance is dependent on the ambient
temperature. Reducing temperature leads to the increase of
the resistance as well as the TEMP pin voltage. When the
TEMP pin voltage exceeds 50.3% of the bias voltage, an
under-temperature fault is triggered. On the other hand, if
the TEMP pin voltage is lower than 12.5%, an over
temperature fault occurs. The TEMP pin voltage has to fall
back to the 14.5% to 42.9% range for the fault be cleared, as
shown in Figure 25.
The ratio, K, of the TEMP pin voltage to the bias voltage is:
R
----------------------=
RTRU+
T
K
Using the ratios at cold and hot temperature limits, as shown
in Figure 25, resulting in:
R
COLD
--------------------7.08=
R
HOT
and
1.012 R⋅
=
R
U
COLD
(EQ. 6)
(EQ. 7)
(EQ. 8)
where R
COLD
and R
are the NTC thermistor resistance
HOT
values at the cold and hot temperature limits respectively.
It is usually difficult to find an NTC thermistor that has the
exact ratio given in EQ. 7. A thermistor with a ratio larger
than 7.08, that is:
R
COLD
--------------------
R
HOT
7.08≥
(EQ. 9)
can be used in series with a regular resistor to form an
effective thermistor that has the right ratio, as shown in
Figure 26. With the series resistor R
, EQ. 7 can be re-
S
written as:
RSR+
COLD
----------------------------------7.08=
RSR+
HOT
(EQ. 10)
Once the thermistor and the temperature limits are selected,
RS and RU can be calculated using
To summarize, the NTC thermistor circuit design requires
three steps:
1. Find an NTC thermistor that satisfies EQ. 9. The
temperature limits are determined by the application
requirement.
2. Calculate the series resistance according to EQ. 11.
3. Calculate the pull-up resistance according to EQ. 12.
The following is a design example. The charger is designed
to charge the battery with the temperature range from 0°C to
55°C. The 10kΩ NTC thermistor NCP15XH103F03RC from
Murata (http://www.murata.com) satisfies EQ. 9. The
resistance table is given in Table 3. The typical resistance at
100%
(50.3%)
V
TMIN
(42.9%)
V
V
TMAX+
V
TMAX
TMIN-
(14.5%)
(12.5%)
Under
Temp
Over
Temp
0
TEMP
Pin
Voltage
FIGURE 25. CRITICAL VOLTAGE LEVELS FOR TEMP PIN
14
V2P8
R
U
TEMP
ISL6298
GND
R
S
R
T
Thermistor
Effective NTC
FIGURE 26. EFFECTIVE NTC THERMISTOR CIRCUIT.
ISL6298
0°C and 55°C are R
respectively. Using EQ. 11 and EQ. 12 result in R
and R
= 27.9kΩ.
U
= 27.2186kΩ and R
COLD
= 3.535kΩ
HOT
S
= 360Ω
Hysteresis Temperature Calculation
Using EQ. 6 is re-arranged as:
K
------------ -
R
T
1K–
R
URS
–⋅=
(EQ. 13)
Substituting the ratio at the hysteresis threshold results in
the NTC thermistor resistance at the threshold. Continuing
the example above, the thermistor values are found to be
20.64kΩ and 4.37kΩ respectively at the low and high
hysteresis temperatures. The corresponding temperatures
are found from the Table 3 to be 7°C and 49°C respectively.
In other words, the hysteresis temperatures for the low and
high temperature limits are approximately 7°C and 6°C
respectively.
Temperature Tolerance Calculation
The temperature accuracy is affected by the accuracy of the
thresholds, R
maximum ratio K, maximum possible R
results in the maximum value of R
R
TMAX,
, RU, and the NTC thermistor. Using the
S
K
MAX
-------------------------
1K
–
MAX
R
R
–⋅=
UMAX,
, and minimum RS
U
from EQ. 13, that is:
T
SMIN,
(EQ. 14)
Working with Current-Limited Adapter
The ISL6298 minimizes the thermal dissipation when
powered by a current-limited ac adapter. The thermal
dissipation can be further reduced when the adapter is
properly designed. For more information regarding working
with current-limited adapters, please refer to the ISL6292
datasheet available at http://www.intersil.com.
Board Layout Recommendations
The ISL6298 internal thermal foldback function limits the
charge current when the internal temperature reaches
approximately 100°C. In order to maximize the current
capability, it is very important that the exposed pad under the
package is properly soldered to the board and is connected
to other layers through thermal vias. More thermal vias and
more copper attached to the exposed pad usually result in
better thermal performance. On the other hand, the number
of vias is limited by the size of the pad. The exposed pad for
the 4x4 QFN package is able to have 5 vias. The 3x3 DFN
package allows 8 vias be placed in two rows. Since the pins
on the 3x3 DFN package are on only two sides, as much top
layer copper as possible should be connected to the
exposed pad to minimize the thermal impedance. Refer to
the ISL6298 evaluation boards for layout examples.
From the Electrical Specification table, the maximum K is
found to be 52.3%. Assuming the resistors have 1%
accuracy, the maximum R
is 356Ω. The resultant maximum R
is 28.2kΩ and the minimum RS
U
is then found to be
T
30.6kΩ and the corresponding temperature is -3°C. Hence
the temperature tolerance is 3°C. Similarly, the high
temperature maximum thermistor value is 3.98kΩ. Hence,
the lowest temperature is 51°C and the tolerance is 4°C.
TABLE 3. RESISTANCE TABLE OF NCP15XH103F03RC
TEMP (°C)R-Low (kΩ)R-Center (kΩ)R-High (kΩ)
-330.364131.020031.6869
026.678027.218627.7675
620.756021.123021.4944
719.922720.266620.6143
504.08334.16094.2395
514.94984.02624.1036
553.46343.53503.6076
15
Dual Flat No-Lead Plastic Package (DFN)
ISL6298
INDEX
SEATING
(DATUM B)
6
INDEX
AREA
(DATUM A)
NX (b)
5
SECTION "C-C"
6
AREA
C
PLANE
NX L
8
A
12
D
TOP VIEW
SIDE VIEW
8
7
D2
D2/2
N-1N
e
(Nd-1)Xe
REF.
BOTTOM VIEW
(A1)
2X
A3
NX b
5
0.415
0.15
C
E
B
A
NX
E2
E2/2
0.10 MC
0.200
NX b
C
A
0.152XB
0.10 C
C
0.08
k
AB
NX L
L10.3x3
10 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE
MILLIMETERS
C
SYMBOL
NOTESMINNOMINALMAX
A0.800.901.00-
A1--0.05-
A30.20 REF-
b0.180.230.285,8
D3.00 BSC-
D21.952.002.057,8
E3.00 BSC-
E21.551.601.657,8
e0.50 BSC-
k0.25--L0.300.350.408
N102
Nd53
Rev. 3 6/04
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd refers to the number of terminals on D.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220-VGGC ISSUE C)
MILLIMETERS
SYMBOL
A0.800.901.00-
A1--0.05-
A2--1.009
A30.20 REF9
b0.230.280.355, 8
D4.00 BSC-
D13.75 BSC9
D21.952.102.257, 8
E4.00 BSC-
E13.75 BSC9
E21.952.102.257, 8
e 0.65 BSC-
k0.25 -- -
L0.500.600.758
L1 --0.1510
N162
Nd43
Ne43
P- -0.609
θ--129
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
NOTESMINNOMINALMAX
Rev. 5 5/04
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
17
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