International Rrectifier IRS2109, IRS21094SPbF User Manual
Data Sheet No. PD60261
IRS2109/IRS21094(S)PbF
Features
Floating channel designed for bootstrap operation
•
Fully operational to +600 V
•
Tolerant to negative transient voltage, dV/dt
•
immune
Gate drive supply range from 10 V to 20 V
•
Undervoltage lockout for both channels
•
3.3 V, 5 V, and 15 V input logic compatible
•
Cross-conduction prevention logic
•
Matched propagation delay for both channels
•
High side output in phase with IN input
•
Logic and power ground +/- 5 V offset.
•
Internal 540 ns deadtime, and programmable
•
up to 5
Lower di/dt gate driver for better noise immunity
•
Shut down input turns off both channels.
•
µs with one external R
resistor (IRS21094)
DT
Description
The IRS2109/IRS21094 are high voltage, high
speed power MOSFET and IGBT drivers with dependent high and low side referenced output
channels. Proprietary HVIC and latch immune
CMOS technologies enable ruggedized monolithic
construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic.
The output drivers feature a high pulse current
buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive
an N-channel power MOSFET or IGBT in the high
side configuration which operates up to 600 V.
HALF-BRIDGE DRIVER
Product Summary
V
OFFSET
IO+/- 120 mA / 250 mA
V
OUT
t
(typ.)750 ns & 200 ns
on/off
Deadtime540 ns
(programmable up to 5
Packages
8 Lead SOIC
8 Lead PDIP
600 V max.
10 V - 20 V
µs for IRS21094)
14 Lead SOIC
14 Lead PDIP
Typical Connection
(Refer to Lead Assignments for correct
configuration). These diagrams show electrical
connections only. Please refer to our
Application Notes and DesignTips for proper
circuit board layout.
IRS2109
T
IRS21094
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IRS2109/IRS21094(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
DTProgrammable deadtime pin voltage (IRS21094 only)
V
IN
V
SS
dVS/dt Allowable offset supply voltage transient — 50 V/ns
PD Package power dissipation @ T
Rth
JA
T
J
T
S
T
L
High side floating absolute voltage -0.3 625
High side floating supply offset voltage VB - 25 VB + 0.3
High side floating output voltage VS - 0.3 V
B
+ 0.3
Low side and logic fixed supply voltage -0.3 25
Low side output voltage -0.3 VCC + 0.3
V
- 0.3V
SS
Logic input voltage (IN & SD)VSS - 0.3V
CC
CC
+ 0.3
+ 0.3
Logic ground (IRS21094 only) VCC -25 VCC +0.3
(8 Lead PDIP) — 1.0
≤ +25 °C
(14 lead PDIP) — 1.6
A
(8 Lead SOIC) — 0.625
(14 lead SOIC) — 1.0
(8 Lead PDIP) — 125
Thermal resistance, junction to ambient
(8 Lead SOIC) — 200
(14 lead PDIP) — 75
(14 lead SOIC) — 120
Junction temperature — 150
Storage temperature -50 150
Lead temperature (soldering, 10 seconds) — 300
V
W
°C/W
°C
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IRS2109/IRS21094(S)PbF
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V
Symbol Definition Min. Max. Units
VB High side floating supply absolute voltage VS + 10 VS + 20
V
S
V
HO
V
CC
V
LO
V
IN
DTProgrammable deadtime pin voltage (IRS21094 only)
V
SS
T
A
Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
High side floating supply offset voltage (Note 1) 600
High side floating output voltage V
Low side and logic fixed supply voltage 10 20
Low side output voltage0V
Logic input voltage (IN & SD) V
Logic ground (IRS21094 only) -5 5
Ambient temperature -40 125 °C
Dynamic Electrical Characteristics
V
(VCC, VBS) = 15 V, VSS = COM, CL = 1000 pF, T
BIAS
and VSS offset rating are tested with all supplies biased at a 15 V differential.
S
V
B
CC
V
CC
V
CC
= 25 °C, DT = V
A
S
SS
V
SS
unless otherwise specified.
SS
V
Symbol Definition Min. Typ. Max. Units Test Conditions
t
on
t
off
t
sd Shut-down propagation delay
MT Delay matching, HS & LS turn-on/off — 0 70
t
t
DT
MDT Deadtime matching = DTLO - HO - DTHO-LO
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Turn-on propagation delay — 750 950 VS = 0 V
Turn-off propagation delay — 200 280 VS = 0 V or 600 V
—200280
ns
Turn-on rise time—100220
r
Turn-off fall time—35 80
f
Deadtime: LO turn-off to HO turn-on(DT
HO turn-off to LO turn-on (DT
LO-HO) &
HO-LO
400540680R
)
456µs RDT = 200 kΩ (IR21094)
— 0 60 R
— 0 600 R
ns
VS = 0 V
= 0 Ω
DT
= 0 Ω
DT
= 200 kΩ (IR21094)
DT
IRS2109/IRS21094(S)PbF
Static Electrical Characteristics
V
(VCC, VBS) = 15 V, VSS = COM, DT= VSS and T
BIAS
parameters are referenced to V
/COM and are applicable to the respective input leads: IN and SD. The VO, IO, and R
SS
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol Definition Min. Typ. Max. Units Test Conditions
V
IH
V
V
SD,TH+ SD input positive going threshold 2.5
V
SD,TH- SD input negative going threshold
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
O+
I
O-
Logic “1” input voltage for HO & logic “0” for LO 2.5 — —
Logic “0” input voltage for HO & logic “1” for LO — — 0.8
IL
High level output voltage, V
Low level output voltage, V
BIAS
O
- V
Offset supply leakage current — — 50 VB = VS = 600 V
Quiescent VBS supply current2075130V
Quiescent VCC supply current
Logic “1” input bias current — 5 20 IN = 5 V, SD = 0 V
Logic “0” input bias current — — 2 IN = 0 V, SD = 5 V
VCC and V
supply undervoltage positive going
BS
threshold
VCC and VBS supply undervoltage negative going
threshold
Hysteresis 0.3 0.7 —
Output high short circuit pulsed current120290—VO = 0 V, PW ≤ 10 µs
Output low short circuit pulsed current 250 600 — V
= 25 °C unless otherwise specified. The V
A
——
——
O
—0.050.2
—0.020.1
0.41.01.6
8.0 8.9 9.8
7.4 8.2 9.0
, V
IL
0.8
V
µA
mA VIN = 0 V or 5 V
µA
V
mA
and I
IH,
IN
VCC = 10 V to 20 V
IO = 2 mA
= 0 V or 5 V
IN
R
= 0 Ω
DT
= 15 V,PW ≤ 10 µs
O
on
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Functional Block Diagrams
IRS 2 10 9
IN
VSS/COM
LEVEL
SHIFT
PULSE
GENERATOR
IRS2109/IRS21094(S)PbF
VB
UV
HV
LEVEL
SHIFTER
PULSE
FILTER
DETECT
R
Q
R
S
HO
VS
SD
DT
SD
VCC
LO
COM
+5V
DEADTIME
VSS/COM
LEVEL
SHIFT
DELAY
UV
DETECT
VB
PULSE
FILTER
UV
DETECT
DETECT
R
RSQ
HO
VS
VCC
UV
LO
COM
IRS21094
HV
LEVEL
IN
DEADTIME
+5V
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
PULSE
GENERATOR
SHIFTER
DELAY
VSS
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IRS2109/IRS21094(S)PbF
Lead Definitions
Symbol Description
IN
SD
DTProgrammable deadtime lead, referenced to VSS. (IRS21094 only)
VSS Logic ground (IRS21094 only)
V
B
HO High side gate drive output
V
S
V
CC
LO Low side gate drive output
COM Low side return
Lead Assignments
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO
(referenced to COM for IRS2109 and VSS for IRS21094)
Logic input for shutdown (referenced to
COM for IRS2109 and VSS for IRS21094)
High side floating supply
High side floating supply return
Low side and logic fixed supply
1
V
CC
2
IN
3
SD
4
COM
V
HO
V
LO
8
B
7
6
S
5
1
V
CC
2
IN
3
SD
4
COM
8 Lead PDIP 8 Lead SOIC
IRS2109PbF IRS2109SPbF
V
HO
V
14
13
B
12
11
S
10
9
8
V
1
CC
IN
2
SD
3
DT
4
VSS
5
COM
6
LO
7
14 Lead PDIP 14 Lead SOIC
V
1
CC
IN
2
SD
3
DT
4
VSS
5
COM
6
LO
7
IRS21094PbF IRS21094SPbF
V
HO
V
LO
V
HO
V
8
B
7
6
S
5
14
13
B
12
11
S
10
9
8
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IRS2109/IRS21094(S)PbF
IN
SD
IN(LO)
50%
50%
IN(HO)
HO
LO
LO
HO
t
on
t
r
90% 90%
10% 10%
Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions
50% 50%
IN
SD
50%
HO
t
sd
90%
HO
LO
DT
LO-HO
90%
10%
LO
MDT=
DT
Figure 3. Shutdown Waveform Definitions
Figure 4. Deadtime Waveform Definitions
LO-HO
t
off
90%
- DT
DT
HO-LO
HO-LO
10%
t
f
IN
(LO)
LO
50%
HO
10%
MT
90%
50%
IN
(HO)
MT
HOLO
Figure 5. Delay Matching Waveform Definitions
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IRS2109/IRS21094(S)PbF
1300
1100
900
Max
Typ.
700
Turn-On Propagation Delay (ns)
500
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 6A. Turn-On Propagation Delay
vs. Temperature
500
400
1300
1100
Max.
900
Typ.
700
Turn-On Propagation Delay (ns)
500
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 6B. Turn-On Propagation Delay
vs. Supply Voltage
500
400
Max.
300
Max.
200
Typ.
100
Turn-Off Propagation Delay (ns)
0
-50-250255075100125
Te mperature (oC)
Figure 7A. Turn-Off Propagation Delay
vs. Temperature
300
Typ.
200
100
Turn-Off Propagation Delay (ns)
0
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 7B. Turn-Off Propagation Delay
vs. Supply Voltage
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IRS2109/IRS21094(S)PbF
500
400
300
M ax.
200
Typ.
100
SD Propagation Delay (ns)
0
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 8A. SD Propagation Delay
vs. Temperature
500
400
500
400
Max.
300
Typ.
200
100
SD Propagation Delay (ns)
0
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 8B. SD Propagation Delay
vs. Supply Voltage
500
400
300
200
Max.
100
T u rn -O n R i se Time (ns)
Turn-On Rise Time (ns)
Typ.
0
-50 -25 0 25 50 75 100 125
Temperature(oC)
Figure 9A. Turn-On Rise Time
vs. Temperature
300
Max.
200
Typ.
100
T u rn -O n R i se Time (ns)
Turn-On Rise Time (ns)
0
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 9B. Turn-On Rise Time
vs. Supply Voltage
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