International Rrectifier IR2175S User Manual

Data Sheet No. PD60208 Rev. E
IR2175(S) & (PbF)
LINEAR CURRENT SENSING IC
Features
Floating channel up to +600V
Monolithic integration
Linear current feedback through shunt resistor
Direct digital PWM output for easy interface
condition
QBS
Low I Independent fast overcurrent trip signal High common mode noise immunity Input overvoltage protection for IGBT short circuit
Open Drain outputs Also available LEAD-FREE
allows the boot strap power supply
Description
The IR2175 is a monolithic current sensing IC designed for motor drive applications. It senses the motor phase current through an external shunt resistor, converts from analog to digital signal, and transfers the signal to the low side. IR’s proprietary high voltage isolation tech­nology is implemented to enable the high bandwidth signal processing. The output format is discrete PWM to eliminate need for the A/D input interface for the IR2175. The dedicated overcurrent trip (OC) signal fa­cilitates IGBT short circuit protection. The open-drain outputs make easy for any interface from 3.3V to 15V. S
Product Summary
V
OFFSET
QBS
V
in
Gain temp.drift 20ppm/
o
Overcurrent trip 2µsec (typ)
signal delay
Overcurrent trip level +/-260mV (typ.)
600Vmax
2mA
+/-260mVmax
o
C (typ.)
130kHz (typ.)
Packages
8 Lead PDIP
IR2175
8 Lead SOIC
IR2175S
Block Diagram
15V
PWM Output
GND
VCC PO
COM
OCOvercurrent
Up to 600V
V+ VS
IR2175
VB
To Motor Phase
(Refer to Lead Assignments for cor­rect pin configuration). This/These diagram(s) show electrical connec­tions only. Please refer to our Appli­cation Notes and DesignTips for proper circuit board layout.
IR2175
(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
S
V
BS
V
CC
V
IN
V
PO
V
OC
dV/dt Allowable offset voltage slew rate 50 V/ns
P
D
Rth
JA
T
J
T
S
T
L
Note 1: Capacitors are required between VB and Vs when bootstrap power is used. The external power supply, when used, is required between VB and Vs pins.
High side offset voltage -0.3 600
High side floating supply voltage
Low side and logic fixed supply voltage -0.3 25
Maximum input voltage between V
Digital PWM output voltage COM -0.3 VCC +0.3
Overcurrent output voltage COM -0.3 VCC +0.3
Package power dissipation @ T
Thermal resistance, junction to ambient 8 lead SOIC 200
Junction temperature 150
Storage temperature -55 150
Lead temperature (soldering, 10 seconds) 300
IN+ and VS
+25°C 8 lead SOIC .625
A
8 lead PDIP 1.0
8 lead PDIP 125
-0.3 25
-5 5
V
W
°C/W
°C
Recommended Operating Conditions
The output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions.
Symbol Definition Min. Max. Units
V
B
V
S
V
PO
V
OC
V
CC
V
IN
T
A
2
High side floating supply voltage VS +13.0 VS +20
High side floating supply offset voltage 0.3 600
Digital PWM output voltage COM VCC
Overcurrent output voltage COM VCC
Low side and logic fixed supply voltage 9.5 20
Input voltage between V
Ambient temperature -40 125
IN+
and V
S
-260 +260 mV
V
°C
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IR2175
(S) & (PbF)
DC Electrical Characteristics
V
= VBS = 15V, and T
CC
Symbol Definition Min. Typ. Max. Units Test Conditions
V
IN
V
OC+
V
OC-
V
OS
V
OS
G Gain (duty cycle % per VIN) 155 160 165 %/V max gain error=5%
G
/
I
LK
I
QBS
I
QCC
LIN Linearity (duty cycle deviation from ideal linearity 0.5 1 %
V
LIN
I
OPO
I
OCC
Note 1: ±10mV offset represents ±1.5% duty cycle fluctuation
Note 2: Gain = (full range of duty cycle in %) / (full input voltage range).
Nominal input voltage range before saturation -260 260
V
IN+
Overcurrent trip positive input voltage
Overcurrent trip negative input voltage -260
Input offset voltage -10 0 10 VIN = 0V (Note 1)
/
T
/
Input offset voltage temperature drift 25 µV/
A
T
Gain temperature drift 20 ppm/oC
A
Offset supply leakage current 50 µA V
Quiescent VBS supply current 2 VS = 0V
Quiescent VCC supply current 0.5
curve)
Linearity temperature drift .005 %/oC
A
T
Digital PWM output sink current 20
OC output sink current 10
= 25o unless otherwise specified.
A
_
V
S
260
2——
1——
mV
mA
mA
o
C
(Note 2)
= VS = 600V
B
VO = 1V
VO = 0.1V
VO = 1V
VO = 0.1V
AC Electrical Characteristics
VCC = VBS = 15V, and T
Symbol Definition Min. Typ. Max. Units Test Conditions
Propagation delay characteristics
fo Carrier frequency output 100 130 180 kHz
f
/
Dmin Minimum duty 9 %
Dmax Maximum duty 91 % V
BW fo bandwidth 15 kHz
PHS Phase shift at 1kHz -10
tdoc Propagation delay time of OC 1 2
twoc Low true pulse width of OC 1.5
Temperature drift of carrier frequency 500 ppm/oC
A
T
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= 25o unless otherwise specified.
A
VIN = 0 & 5V
V
+ = 100mVpk -pk
IN
sine wave, gain=-3dB
o
VIN+ =100mVpk-pk
µsec
figure 1
VIN+=-260mV,
+=+260mV
IN
sine wave
3
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