Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V (IR2136),
•
11.5 to 20V (IR21362) or 12 to 20V (IR21363)
Undervoltage lockout for all channels
•
Over-current shutdown turns off all six drivers
•
Independent 3 half-bridge drivers
•
Matched propagation delay for all channels
•
Lowside outputs out of phase with inputs. High
•
side outputs out of phase (IR2136/IR21363) or in
phase (IR21362) with inputs.
Cross-conduction prevention logic
•
3.3V logic compatible
•
Lower di/dt gate driver for better noise immunity
•
Externally programmable delay for automatic fault
•
clear
Description
The IR2136/IR21362/IR21363(J&S) are high votage, high
speed power MOSFET and IGBT drivers with three independent high and low side referenced output
channels for 3-phase applications. Proprietary HVIC
technology enables ruggedized monolithic construction. Logic inputs are compatible with CMOS or
LSTTL outputs, down to 3.3V logic. A current trip
function which terminates all six outputs can be derived from an external current sense resistor. An enable
function is available to terminate all six outputs simultaneously. An open-drain FAULT signal is provided to
indicate that an overcurrent or undervoltage shutdown
has occurred. Overcurrent fault conditions are cleared
(
&
S
J
3-PHASE BRIDGE DRIVER
Product Summary
V
OFFSET
I
+/-120 mA / 250 mA
O
V
OUT
10 - 20V or 12V - 20V
Deadtime (typ.)200 nsec
t
(typ.)400 nsec
on/off
Packages
28-Lead SOIC
44-Lead PLCC w/o 12 leads
automatically after a delay programmed externally via
an RC network connected to the RCIN input. The output drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high
frequency applications. The floating channel can be used
to drive N-channel power MOSFETs or IGBTs in the
high side configuration which operates up to 600 volts.
600V max.
28-Lead PDIP
)
Typical Connection
HIN1,2,3 / HIN1,2,3
(Refer to Lead Assignments for
correct pin configuration). This/
These diagram(s) show electrical
connections only. Please refer to
our Application Notes and
DesignTips for proper circuit
board layout.
www.irf.com1
VCC
LIN1,2,3
FAULT
EN
GND
VCC
HIN1,2,3 / HIN1,2,3
LIN1,2,3
FAULT
EN
RCIN
ITRIP
VSSCOM
VB1,2,3
HO1,2,3
VS1,2,3
LO1,2,3
IR2136(2)(3)
up to 600V
TO
LOAD
IR2136/IR21362/IR21363
LIN
(J&S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
SymbolDefinitionMin.Max.Units
V
S
V
BS
V
HO
V
CC
V
SS
V
LO1,2,3
V
IN
V
FLT
dV/dtAllowable offset voltage slew rate—50V/ns
P
D
Rth
JA
T
J
T
S
T
L
High side offset voltage-0.3600
High side floating supply voltage-0.325
High side floating output voltageV
Low side and logic fixed supply voltage-0.325
Logic groundV
Low side output voltage-0.3VCC + 0.3
Input voltage
FAULT output voltageVSS - 0.3V
Package power dissipation @ TA ≤ +25°C(28 lead PDIP)—1.5
Thermal resistance, junction to ambient(28 lead PDIP)—83
Junction temperature—125
Storage temperature-55150
Lead temperature (soldering, 10 seconds)—300
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute referenced to COM. The VS offset rating is tested with all supplies
biased at 15V differential.
SymbolDefinitionMin.Max.Units
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
LO1,2,3
V
CC
V
SS
V
FLT
V
RCIN
2www.irf.com
High side floating supply voltage IR21361020
IR2136211.5 20
IR213631220
High side floating supply offset voltageNote 1600
High side output voltageV
Low side output voltage0V
Low side and logic fixed supply voltage IR21361020
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute referenced to COM. The VS offset rating is tested with all supplies
biased at 15V differential.
SymbolDefinitionMin.Max.Units
V
ITRIP
V
IN
T
A
Note 1: Logic operational for VS of COM -5 to COM +600V. Logic state held for VS of COM -5V to -COM -VBS. (Please
refer to the Design Tip DT97-3 for more details).
Note 2: All input pins and the ITRIP pin are internally clamped with a 5.2V zener diode.
ITRIP input voltageV
Logic input voltage
Ambient temperature-40125
, HIN (IR2136), HIN(IR21362), ENV
SS
SS
+5
V
SS
+5
V
SS
V
o
C
Static Electrical Characteristics
V
BIAS (VCC
are applicable to all six channels (H
and are applicable to the respective output leads: H
SymbolDefinitionMin. Typ. Max. Units Test Conditions
V
EN,TH+
V
V
V
V
RCIN,TH+
V
RCIN,HYS
V
V
V
V
V
CCUVHVCC
V
V
IN, CLAMP Input clamp voltage (HIN, LIN, ITRIP and EN)
, VBS1,2,3) = 15V unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and
V
V
EN,TH-
IT,TH+
IT,HYS
V
OH
V
OL
CCUV+VCC
BSUV+
CCUVBSUV-
BSUVH
I
LK
I
QBS
I
QCC
I
LIN+
Logic “0” input voltage LIN1,2,3, HIN1,2,33——
IH
Logic “1” input voltage HIN1,2,3
Logic “1” input voltage LIN1,2,3, HIN1,2,3——0.8
IL
Logic “0” input voltage HIN1,2,3
EN positive going threshold——3
EN negative going threshold0.8——
ITRIP positive going threshold370460550
ITRIPinput hysteresis—70—
RCIN positive going threshold—8—
RCIN input hysteresis—3—
High level output voltage, V
Low level output voltage, V