International Rrectifier IR2130, IR2132 User Manual

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Data Sheet No. PD60019-M

IR2130/IR2132 (J)(S)

3-PHASE BRIDGE DRIVER

Features

Product Summary

• Floating channel designed for bootstrap operation

Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune

V

OFFSET

IO+/- 200 mA / 420 mA

600V max.

• Gate drive supply range from 10 to 20V

• Undervoltage lockout for all channels

• Over-current shutdown turns off all six drivers

• Independent half-bridge drivers

• Matched propagation delay for all channels

• 2.5V logic compatible

• Outputs out of phase with inputs

• Cross-conduction prevention logic

t

on/off

V

OUT

(typ.) 675 & 425 ns

10 - 20V

Deadtime (typ.) 2.5 µs (IR2130)

0.8 µs (IR2132)

Description

The IR2130/IR2132(J)(S) is a high voltage, high speed
power MOSFET and IGBT driver with three independent
high and low side referenced output channels. Proprietary
HVIC technology enables ruggedized monolithic construc­tion. Logic inputs are compatible with CMOS or LSTTL
outputs, down to 2.5V logic. A ground-referenced
operational amplifier provides analog feedback of bridge
current via an external current sense resistor. A current
trip function which terminates all six outputs is also

signal

derived from this resistor. An open drain
indicates if an over-current or undervoltage shutdown has
occurred. The output drivers feature a high pulse current
buffer stage designed for minimum driver cross-conduction.
Propagation delays are matched to simplify use at high frequencies. The floating channels can be used to drive
N-channel power MOSFETs or IGBTs in the high side configuration which operate up to 600 volts.

FAULT

Packages

28-Lead SOIC

28-Lead PDIP

44-Lead PLCC w/o 12 Leads

T ypical Connection

(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer
to our Application Notes and DesignTips for proper circuit board layout.

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IR2130/IR2132

J)(S

(

)

Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param­eters are absolute voltages referenced to VS0. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 50 through 53.

Symbol Definition Min. Max. Units

V

B1,2,3

V

S1,2,3

V

HO1,2,3

V

CC

V

SS

V

LO1,2,3

V

IN

V

FLT

V

CAO

V

CA-

dVS/dt Allowable Offset Supply Voltage Transient — 50 V/ns

P

D

Rth

JA

T

J

T

S

T

L

High Side Floating Supply Voltage -0.3 625
High Side Floating Offset Voltage V
High Side Floating Output Voltage V

B1,2,3

S1,2,3

- 25 V

- 0.3 V

B1,2,3
B1,2,3

+ 0.3

+ 0.3

Low Side and Logic Fixed Supply Voltage -0.3 25
Logic Ground VCC - 25 V
Low Side Output Voltage -0.3 V
Logic Input Voltage (

Output V oltage VSS - 0.3 V

FAULT

HIN1,2,3, LIN1,2,3

& ITRIP) VSS - 0.3 V

Operational Amplifier Output Voltage VSS - 0.3 V
Operational Amplifier Inverting Input Voltage VSS - 0.3 V

CC
CC

SS
CC
CC
CC

+ 0.3
+ 0.3

+ 15
+ 0.3
+ 0.3
+ 0.3

V

Package Power Dissipation @ TA ≤ +25°C (28 Lead DIP) — 1.5

(28 Lead SOIC) — 1.6 W

(44 Lead PLCC) — 2.0

Thermal Resistance, Junction to Ambient (28 Lead DIP) — 83

(28 Lead SOIC) — 78 °C/W

(44 Lead PLCC) — 63
Junction Temperature — 150
Storage Temperature -55 150 °C
Lead Temperature (Soldering, 10 seconds) — 300

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to VS0. The VS offset rating is tested
with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54.

Symbol Definition Min. Max. Units

V

B1,2,3

V

S1,2,3

V

HO1,2,3

V

CC

V

SS

V

LO1,2,3

V

IN

V

FL T

V

CAO

V

CA-

T

A

Note 1: Logic operational for VS of (VS0 - 5V) to (VS0 + 600V). Logic state held for VS of (VS0 - 5V) to (VS0 - VBS).
(Please refer to the Design Tip DT97-3 f or more details).
Note 2: All input pins, CA- and CAO pins are internally clamped with a 5.2V zener diode.

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High Side Floating Supply Voltage V

S1,2,3

+ 10 V

S1,2,3

+ 20
High Side Floating Offset Voltage Note 1 600
High Side Floating Output Voltage V

S1,2,3

V

B1,2,3

Low Side and Logic Fixed Supply Voltage 10 20
Logic Ground -5 5
Low Side Output Voltage 0 V
Logic Input Voltage (

Output Voltage V

FAULT

Operational Amplifier Output V oltage V
Operational Amplifier Inverting Input Voltage V

HIN1,2,3, LIN1,2,3

& ITRIP) V

SS
SS
SS
SS

CC

VSS + 5

V

CC

VSS + 5
VSS + 5

Ambient T emperature -40 125 °C

V

IR2130/IR2132

J)(S

(

Dynamic Electrical Characteristics

V

BIAS

(VCC, V

BS1,2,3

) = 15V, V

= VSS, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic

S0,1,2,3

electrical characteristics are defined in Figures 3 through 5.

Symbol Definition Figure Min. T yp. Max. Units Test Conditions

t

on

t

off

t
t

t

itrip

t

bl

t

flt

t

flt,in

t

fltclr

DT Deadtime (IR2130) 18 1.3 2.5 3.7

SR+ Operational Amplifier Slew Rate (+) 19 4 .4 6.2 —

SR- Operational Amplifier Slew Rate (-) 20 2.4 3.2 —

NOTE: For high side PWM, HIN pulse width must be ≥ 1.5µsec

Turn-On Propagation Delay 11 500 675 850
Turn-Off Propagation Delay 12 300 42 5 550 V
Turn-On Rise Time 13 — 80 125 V

r

Turn-Off Fall Time 14 — 35 55

f

ITRIP to Output Shutdown Prop. Delay 15 400 660 920 VIN, V
ITRIP Blanking Time ——400 — V
ITRIP to

FAULT

Indication Delay 16 335 59 0 84 5 V

Input Filter Time (All Six Inputs) ——310 — V

LIN1,2,3

to

Clear Time 17 6.0 9.0 12.0 V

FAULT

(IR2132) 18 0.4 0.8 1.2

ns

µs

V/µs

S1,2,3

, V

IN

, V

IN

V

IN

IN

IN

= 0 & 5V

= 0 to 600V

= 0 & 5V

ITRIP

= 1V

ITRIP

= 0 & 5V

ITRIP

= 0 & 5V

= 0 & 5V

ITRIP

= 0 & 5V

Static Electrical Characteristics

V

(VCC, V

BIAS

are referenced to VSS and are applicable to all six logic input leads:
are referenced to V

BS1,2,3

) = 15V, V

and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.

S0,1,2,3

= VSS and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters

S0,1,2,3

HIN1,2,3

&

LIN1,2,3

. The VO and IO parameters

)

Symbol Definition Figure Min. Typ. Max. Units Test Conditions

V
V

V

IT,TH+

V

OH

V

OL

I

LK

I

QBS

I

QCC

I

IN+

I

IN-

I

ITRIP+

I

ITRIP-

V

BSUV+

V

BSUV-

V

CCUV+

V

CCUV -

R

on,FLT

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Logic “0” Input Voltage (OUT = LO) 21 2 .2 ——

IH

Logic “1” Input Voltage (OUT = HI) 22 ——0.8

IL

V

ITRIP Input Positive Going Threshold 23 400 490 58 0
High Level Output Voltage, V

- VO 24 ——100 VIN = 0V, IO = 0A

BIAS

mV
Low Level Output Voltage, VO 25 ——100 VIN = 5V, IO = 0A
Offset Supply Leakage Current 26 ——50 VB = VS = 600V
Quiescent VBS Supply Current 27 — 15 30 VIN = 0V or 5V

µA

Quiescent VCC Supply Current 28 — 3.0 4.0 mA VIN = 0V or 5V
Logic “1” Input Bias Current (OUT = HI) 29 — 450 650 VIN = 0V
Logic “0” Input Bias Current (OUT = LO) 30 — 225 400 VIN = 5V

µA

“High” ITRIP Bias Current 31 — 75 150 ITRIP = 5V
“Low” ITRIP Bias Current 32 ——100 nA ITRIP = 0V

VBS Supply Undervoltage Positive Going 33 7.5 8.35 9.2
Threshold
VBS Supply Undervoltage Negative Going 34 7.1 7.95 8.8
Threshold
VCC Supply Undervoltage Positive Going 35 8 .3 9.0 9.7

V

Threshold
VCC Supply Undervoltage Negative Going 36 8.0 8.7 9.4
Threshold

Low On-Resistance 37 — 55 75 Ω

FAULT

IR2130/IR2132

J)(S

(

)

Static Electrical Characteristics -- Continued

V

(VCC, V

BIAS

are referenced to VSS and are applicable to all six logic input leads:
are referenced to V

Symbol Definition Figure Min. Typ. Max. Units Test Conditions

I

O+

I

O-

V

OS

I

CA-

CMRR Op. Amp. Common Mode Rejection Ratio 42 60 80 — VS0=V

PSRR Op. Amp. Power Supply Rejection Ratio 43 55 75 — VS0 = V

V

OH,AMP

V

OL,AMP

I

SRC,AMP

I

SRC,AMP

I

O+,AMP

I

O-,AMP

) = 15V, V

BS1,2,3

and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.

S0,1,2,3

Output High Short Circuit Pulsed Current 38 2 00 250 — VO = 0V, V

Output Low Short Circuit Pulsed Current 39 420 500 — VO = 15V, V

Operational Amplifer Input Offset Voltage 40 ——30 mV VS0 = V
CA- Input Bais Current 41 ——4.0 nA V

Op. Amp. High Level Output Voltage 44 5.0 5.2 5.4 V V
Op. Amp. Low Level Output Voltage 45 ——20 mV V
Op. Amp. Output Source Current 46 2 .3 4.0 — V

Op. Amp. Output Sink Current 47 1 .0 2.1 — V

Operational Amplifier Output High Short 48 — 4.5 6.5 V
Circuit Current V
Operational Amplifier Output Low Short 49 — 3.2 5.2 V
Circuit Current V

= VSS and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters

S0,1,2,3

HIN1,2,3

&

LIN1,2,3

. The VO and IO parameters

mA

dB

VCC = 10V & 20V

CA­CA­CA-

CA-

mA

CA-

CA-

PW ≤ 10 µs

PW ≤ 10 µs

CA-

= 2.5V

CA-

=0.1V & 5V

CA-

CA-

= 0V, VS0 = 1V
= 1V, VS0 = 0V
= 0V, VS0 = 1V
V

CAO

= 1V, VS0 = 0V
V

CAO

= 0V, VS0 = 5V

CAO

= 5V, VS0 = 0V

CAO

IN

IN

= 0.2V

= 0.2V

= 4V

= 2V

= 0V

= 5V

= 0V

= 5V

Lead Assignments

28 Lead PDIP 44 Lead PLCC w/o 12 Leads 28 Lead SOIC (Wide Body)

IR2130 / IR2132 IR2130J / IR2132J IR2130S / IR2132S

Part Number

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Functional Block Diagram

IR2130/IR2132

J)(S

(

)

Lead Definitions

Symbol Description

HIN1,2,3 Logic inputs for high side gate driver outputs (HO1,2,3), out of phase
LIN1,2,3 Logic inputs for low side gate driver output (LO1,2,3), out of phase
FAULT Indicates over-current or undervoltage lockout (low side) has occurred, negative logic
V

CC

ITRIP Input for over-current shutdown
CAO Output of current amplifier
CA- Negative input of current amplifier
V

SS

V

B1,2,3

HO1,2,3 High side gate drive outputs
V

S1,2,3

LO1,2,3 L ow side gate drive outputs
V

S0

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Low side and logic fixed supply

Logic ground
High side floating supplies

High side floating supply returns

Low side return and positive input of current amplifier

IR2130/IR2132

HIN1,2,3

LIN1,2,3

ITRIP

FAULT

HO1,2,3

LO1,2,3

Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit

J)(S

(

)

HIN1,2,3

50% 50%

HIN1,2,3
LIN1,2,3

50% 50%

LIN1,2,3

LO1,2,3

HO1,2,3

50% 50%

DT DT

HO1,2,3
LO1,2,3

t

r

on

90% 90%

10% 10%

t

off

t

Figure 3. Deadtime Waveform Definitions Figure 4. Input/Output Switching Time Waveform

Definitions

LIN1,2,3

ITRIP

FAULT

LO1,2,3

50%

50% 50%

50%

50%

V

S0

CA-

V

CC

+

­V

SS

t

f

CAO

t

flt

t

itrip

Figure 5. Overcurrent Shutdown Switching Time

Waveform Definitions

t

fltclr

V

SS

Figure 6. Diagnostic Feedback Operational Amplifier

Circuit

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IR2130/IR2132

J)(S

(

)

15V

V

3V

0V

∆T1 ∆T2

3V

0V

SR+ =

∆V

∆V

∆T1

CA­V

90%

10%

S0

+

-

SR- =

CC

V

SS

∆V

∆T2

Figure 7. Operational Amplifier Slew Rate

Measurement

15V

V

CC

-

CA-

+

V

S0

Measure V

CAO1

V

CAO2

CMRR = -20*LOG

V

SS

at VS0 = 0.1V

at V

= 5V

S0

(V

-0.1V) - (V

CAO1

CAO2

4.9V

CAO

50 pF

-5V)

CAO

(dB)

15V

20k

V

CC

+

­V

SS

V

VOS =

CAO

21

CAO

- 0.2V

0.2V

V

S0

CA-

+

1k

Figure 8. Operational Amplifier Input Offset Voltage

Measurement

V

CC

V

S0

0.2V

CA-

+

20k

1k

Measure V

PSRR = -20*LOG

+

­V

SS

at VCC = 10V

CAO1

V

at V

CAO2

= 20V

CC

V

CAO1

(10V) (21)

CAO

- V

CAO2

Figure 9. Operational Amplifier Common Mode

Rejection Ratio Measurements

Figure 10. Operational Amplifier Power Supply

Rejection Ratio Measurements

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IR2130/IR2132

y

y

J)(S

(

)

1.50

1.20

Max.

0.90

Typ.

0.60

Min.

Turn-On Delay Time (µs)

0.30

0.00

-50 -25 0 25 50 75 100 125
Temperature (°C)

1.50
Max

1.20
Typ.

0.90

0.60

T u rn-On Time (µs)

0.30

1.50

1.20

Max.

0.90

T

p.

0.60

Min.

Turn-On Delay Time (µs)

0.30

0.00
10 12 14 16 18 20

V

Supply Voltage (V)

BIAS

Figure 11B. T urn-On Time vs. Supply V oltageFigure 11A. Turn-On Time vs. Temperature

1.00

0.80

0.60

Max.

Typ.

0.40

Turn-Off Delay Time (µs)

Min.

0.20

0.00
0123456

Input Voltage (V)

Figure 11C. Turn-On Time vs. Voltage

1.00

0.80

Max.

0.60

T

p.

0.40

Min.

Turn-Off Delay Time (µs)

0.20

0.00
10 12 14 16 18 20

V

Supply Voltage (V)

BIAS

Figure 12B. T urn-Off Time vs. Supply Voltage

0.00

-50 -25 0 25 50 75 100 125
Temperature (°C)

Figure 12A. T urn-Off Time vs. T emperature

1.50

1.20

0.90
Max

0.60

T u rn-Off Time (µs)

0.30

Typ
Min.

0.00

0123456

Input Voltage (V)

Figure 12C. T urn-Off Time vs. Input V oltage

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