n Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
n Gate drive supply range from 10 to 20V
n Undervoltage lockout for all channels
n Over-current shutdown turns off all six drivers
n Independent half-bridge drivers
n Matched propagation delay for all channels
n Outputs out of phase with inputs
Description
The IR2132 is a high voltage, high speed power
MOSFET and IGBT driver with three independent high
and low side referenced output channels . Proprietary
HVIC technology enables ruggedized monolithic construction. Logic inputs are compatible with 5V CMOS
or LSTTL outputs. A ground-referenced oper ational
amplifier provides analog feedback of bridge current
via an external current sense resistor. A current tr ip
function which terminates all six outputs is also derived from this resistor. An open drain
indicates if an over-current or undervoltage shutdo wn
has occurred. The output drivers feature a high pulse
current buffer stage designed for minimum dri ver
cross-conduction. Propagation delays are matched
to simplify use at high frequencies. The floating channels can be used to drive N-channel power MOSFETs
or IGBTs in the high side configuration which operate up to 600 volts.
FAULT signal
Product Summary
V
OFFSET
IO+/-200 mA / 420 mA
V
OUT
t
(typ.)675 & 425 ns
on/off
Deadtime (typ.)0.8 µs
600V max.
10 - 20V
Packages
Typical Connection
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-165
IR2132
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to VS0. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 50 through 53.
ParameterValue
SymbolDefinitionMin.Max.Units
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
V
FLT
V
CAO
V
CA-
dVS/dtAllowable Offset Supply Voltage Transient—50V/ns
P
D
R
θJA
T
J
T
S
T
L
High Side Floating Supply Voltage-0.3525
High Side Floating Offset VoltageV
High Side Floating Output VoltageV
B1,2,3
S1,2,3
- 25V
- 0.3V
B1,2,3
B1,2,3
+ 0.3
+ 0.3
Low Side and Logic Fixed Supply Voltage-0.325
Logic GroundVCC - 25V
Low Side Output Voltage-0.3V
Logic Input Voltage (
Package Power Dissipation @ TA≤ +25°C(28 Lead DIP)—1.5
(28 Lead SOIC)—1.6W
(44 Lead PLCC)—2.0
Thermal Resistance, Junction to Ambient(28 Lead DIP)—83
(28 Lead SOIC)—78°C/W
(44 Lead PLCC)—63
Junction Temperature—150
Storage Temperature-55150°C
Lead Temperature (Soldering, 10 seconds)—300
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to VS0. The VS offset rating is tested
with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54.
ParameterValue
SymbolDefinitionMin.Max.Units
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
V
FLT
V
CAO
V
CA-
T
A
Note 1: Logic operational for VS of (VS0 - 5V) to (VS0 + 600V). Logic state held for VS of (VS0 - 5V) to (VS0 - VBS).
B-166 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
High Side Floating Supply VoltageV
S1,2,3
+ 10V
S1,2,3
+ 20
High Side Floating Offset VoltageNote 1600
High Side Floating Output VoltageV
S1,2,3
V
B1,2,3
Low Side and Logic Fixed Supply Voltage1020
Logic Ground-55
Low Side Output Voltage0V
Logic Input Voltage (
electrical characteristics are defined in Figures 3 through 5.
SymbolDefinitionFigure Min.Typ. Max. Units Test Conditions
t
on
t
off
t
r
t
f
t
itrip
t
bl
t
flt
t
flt,in
t
fltclr
DTDeadtime180.40.81.2V
SR+Operational Amplifier Slew Rate (+)194.46.2—
SR-Operational Amplifier Slew Rate (-)202.43.2—
Static Electrical Characteristics
V
(VCC, V
BIAS
are referenced to VSS and are applicable to all six logic input leads:
are referenced to V
SymbolDefinitionFigure Min.Typ. Max. Units Test Conditions
V
IH
V
IL
V
IT,TH+
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
I
ITRIP+
I
ITRIP-
V
BSUV+
V
BSUV-
V
CCUV+
V
CCUV-
R
on,FLT
BS1,2,3
) = 15V, V
= VSS, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic
S0,1,2,3
ParameterValue
Tur n-On Propagation Delay11500675850
Tur n-Off Propagation Delay12300425550V
Turn-On Rise Time13—80125V
Tur n-Off Fall Time14—3555
ITRIP to Output Shutdown Prop. Delay154 006 60920VIN, V
ns
ITRIP Blanking Time——400—V
ITRIP to
Indication Delay16335590845V
FAULT
Input Filter Time (All Six Inputs)——310—V
LIN1,2,3
to
Clear Time176.09.012.0V
FAULT
µs
S1,2,3
, V
IN
, V
IN
IN
IN
IN
= 0 & 5V
= 0 to 600V
= 0 & 5V
ITRIP
= 1V
ITRIP
= 0 & 5V
ITRIP
= 0 & 5V
= 0 & 5V
ITRIP
= 0 & 5V
V/µs
BS1,2,3
) = 15V, V
and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.
S0,1,2,3
= VSS and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters
S0,1,2,3
HIN1,2,3
&
LIN1,2,3. The V
and IO parameters
O
ParameterValue
Logic “0” Input Voltage (OUT = LO)212.2——
Logic “1” Input Voltage (OUT = HI)22——0.8
ITRIP Input Positive Going Threshold23400490580
High Level Output Voltage, V
28 Lead DIP44 Lead PLCC w/o 12 Leads28 Lead SOIC (Wide Body)
IR2132IR2132JIR2132S
Part Number
B-168 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Functional Block Diagram
IR2132
Lead Definitions
Lead
SymbolDescription
HIN1,2,3
LIN1,2,3
FAULT
V
CC
ITRIPInput for over-current shutdown
CAOOutput of current amplifier
CA-Negative input of current amplifier
V
SS
V
B1,2,3
HO1,2,3High side gate drive outputs
V
S1,2,3
LO1,2,3Low side gate drive outputs
V
S0
Logic inputs for high side gate driver outputs (HO1,2,3), out of phase
Logic inputs for low side gate driver output (LO1,2,3), out of phase
Indicates over-current or undervoltage lockout (low side) has occurred, negative logic
Low side and logic fixed supply
Logic ground
High side floating supplies
High side floating supply returns
Low side return and positive input of current amplifier
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-169
IR2132
Device Information
Process & Design RuleHVDCMOS 4.0 µm
Transistor Count700
Die Size126 X 175 X 26 (mil)
Die Outline
Thickness of Gate Oxide800Å
ConnectionsMaterialPoly Silicon
Contact Hole Dimension8 µm X 8 µm
Insulation LayerMaterialPSG (SiO2)
Thickness1.5 µm
PassivationMaterialPSG (SiO2)
(1)Thickness1.5 µm
PassivationMaterialProprietary*
(2)ThicknessProprietary*
Method of SawFull Cut
Method of Die BondAblebond 84 - 1
Wire BondMethodThermo Sonic
MaterialAu (1.0 mil / 1.3 mil)
LeadframeMaterialCu
Die AreaAg
Lead PlatingPb : Sn (37 : 63)
Pa ckageTypes28 Lead PDIP & SOIC / 44 Lead PLCC
MaterialsEME6300 / MP150 / MP190
Remarks:* P atent Pending
B-170 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
HIN1,2,3
LIN1,2,3
IR2132
ITRIP
FAULT
HO1,2,3
LO1,2,3
IR2132
Figure 1. Input/Output Timing DiagramFigure 2. Floating Supply Voltage T ransient Test Circuit